Searched refs:DefInstr (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | MachineCombiner.cpp | 106 MachineInstr *DefInstr = nullptr; in getOperandDef() local
109 DefInstr = MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
111 if (DefInstr && DefInstr->isPHI()) in getOperandDef()
112 DefInstr = nullptr; in getOperandDef()
113 return DefInstr; in getOperandDef()
151 MachineInstr *DefInstr = InsInstrs[II->second]; in getDepth() local
152 assert(DefInstr && in getDepth()
156 DefInstr, DefInstr->findRegisterDefOperandIdx(MO.getReg()), in getDepth()
159 MachineInstr *DefInstr = getOperandDef(MO); in getDepth() local
160 if (DefInstr) { in getDepth()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineCombiner.cpp | 139 MachineInstr *DefInstr = nullptr; in getOperandDef() local
142 DefInstr = MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
144 if (DefInstr && DefInstr->isPHI()) in getOperandDef()
145 DefInstr = nullptr; in getOperandDef()
146 return DefInstr; in getOperandDef()
183 MachineInstr *DefInstr = InsInstrs[II->second]; in getDepth() local
184 assert(DefInstr && in getDepth()
187 int DefIdx = DefInstr->findRegisterDefOperandIdx(MO.getReg()); in getDepth()
189 LatencyOp = TSchedModel.computeOperandLatency(DefInstr, DefIdx, in getDepth()
192 MachineInstr *DefInstr = getOperandDef(MO); in getDepth() local
[all …]
|
| D | LiveRangeShrink.cpp | 199 MachineInstr &DefInstr = *MRI.def_instr_begin(Reg); in runOnMachineFunction() local
200 if (!DefInstr.isCopy()) in runOnMachineFunction()
202 Insert = FindDominatedInstruction(DefInstr, Insert, IOM); in runOnMachineFunction()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 323 MachineInstr *DefInstr = MRI.getUniqueVRegDef(Reg); in runOnMachineFunction() local
324 assert(DefInstr); in runOnMachineFunction()
325 switch(DefInstr->getOpcode()) { in runOnMachineFunction()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIFixSGPRCopies.cpp | 326 MachineInstr *DefInstr = MRI.getVRegDef(Reg); in phiHasBreakDef() local
327 switch (DefInstr->getOpcode()) { in phiHasBreakDef()
335 if (phiHasBreakDef(*DefInstr, MRI, Visited)) in phiHasBreakDef()
|
| D | AMDGPUMachineCFGStructurizer.cpp | 346 MachineInstr *DefInstr, const MachineRegisterInfo *MRI,
350 MachineInstr *DefInstr,
694 MachineInstr *DefInstr, in storeLiveOutReg() argument
721 if ((&(*MII)) == DefInstr) { in storeLiveOutReg()
734 MachineInstr *DefInstr, in storeLiveOutRegRegion() argument
1977 MachineInstr *DefInstr = getDefInstr(SourceReg); in insertChainedPHI() local
1978 if (DefInstr->isPHI() && DefInstr->getParent() == CodeBB && IsSingleBB) { in insertChainedPHI()
1987 storePHILinearizationInfoDest(DestReg, *DefInstr); in insertChainedPHI()
1991 DefInstr->eraseFromParent(); in insertChainedPHI()
1994 if (IsSingleBB && DefInstr->getParent() == InnerRegion->getEntry()) { in insertChainedPHI()
|
| D | SIPeepholeSDWA.cpp | 320 MachineInstr *DefInstr = MRI->getUniqueVRegDef(Reg->getReg()); in findSingleRegDef() local
321 if (!DefInstr) in findSingleRegDef()
324 for (auto &DefMO : DefInstr->defs()) { in findSingleRegDef()
|