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Searched refs:DefMI (Results 1 – 25 of 127) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DMLxExpansionPass.cpp95 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() local
97 if (DefMI->getParent() != MBB) in getAccDefMI()
99 if (DefMI->isCopyLike()) { in getAccDefMI()
100 Reg = DefMI->getOperand(1).getReg(); in getAccDefMI()
102 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
105 } else if (DefMI->isInsertSubreg()) { in getAccDefMI()
106 Reg = DefMI->getOperand(2).getReg(); in getAccDefMI()
108 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
114 return DefMI; in getAccDefMI()
149 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() local
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DARMHazardRecognizer.cpp19 static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, in hasRAWHazard() argument
30 return MI->readsRegister(DefMI->getOperand(0).getReg(), &TRI); in hasRAWHazard()
45 MachineInstr *DefMI = LastMI; in getHazardType() local
58 DefMI = &*I; in getHazardType()
62 if (TII.isFpMLxInstruction(DefMI->getOpcode()) && in getHazardType()
64 hasRAWHazard(DefMI, MI, TII.getRegisterInfo()))) { in getHazardType()
/external/llvm/lib/Target/ARM/
DMLxExpansionPass.cpp95 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() local
97 if (DefMI->getParent() != MBB) in getAccDefMI()
99 if (DefMI->isCopyLike()) { in getAccDefMI()
100 Reg = DefMI->getOperand(1).getReg(); in getAccDefMI()
102 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
105 } else if (DefMI->isInsertSubreg()) { in getAccDefMI()
106 Reg = DefMI->getOperand(2).getReg(); in getAccDefMI()
108 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
114 return DefMI; in getAccDefMI()
149 MachineInstr *DefMI = MRI->getVRegDef(Reg); in hasLoopHazard() local
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DARMHazardRecognizer.cpp19 static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, in hasRAWHazard() argument
30 return MI->readsRegister(DefMI->getOperand(0).getReg(), &TRI); in hasRAWHazard()
45 MachineInstr *DefMI = LastMI; in getHazardType() local
58 DefMI = &*I; in getHazardType()
62 if (TII.isFpMLxInstruction(DefMI->getOpcode()) && in getHazardType()
64 hasRAWHazard(DefMI, MI, TII.getRegisterInfo()))) { in getHazardType()
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp155 const MachineInstr *DefMI, unsigned DefOperIdx, in computeOperandLatency() argument
159 return TII->defaultDefLatency(SchedModel, *DefMI); in computeOperandLatency()
164 OperLatency = TII->getOperandLatency(&InstrItins, *DefMI, DefOperIdx, in computeOperandLatency()
168 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
175 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, *DefMI); in computeOperandLatency()
183 std::max(InstrLatency, TII->defaultDefLatency(SchedModel, *DefMI)); in computeOperandLatency()
187 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOperandLatency()
188 unsigned DefIdx = findDefIdx(DefMI, DefOperIdx); in computeOperandLatency()
211 if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit() in computeOperandLatency()
212 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() in computeOperandLatency()
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DLiveRangeEdit.cpp52 const MachineInstr *DefMI, in checkRematerializable() argument
54 assert(DefMI && "Missing instruction"); in checkRematerializable()
56 if (!TII.isTriviallyReMaterializable(*DefMI, aa)) in checkRematerializable()
69 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable() local
70 if (!DefMI) in scanRemattable()
72 checkRematerializable(OrigVNI, DefMI, aa); in scanRemattable()
166 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
172 if (DefMI && DefMI != MI) in foldAsLoad()
176 DefMI = MI; in foldAsLoad()
186 if (!DefMI || !UseMI) in foldAsLoad()
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DMachineTraceMetrics.cpp606 const MachineInstr *DefMI; member
610 DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp) in DataDep()
611 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {} in DataDep()
619 DefMI = DefI->getParent(); in DataDep()
765 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeCrossBlockCriticalPath() local
767 const TraceBlockInfo &DefTBI = BlockInfo[DefMI->getParent()->getNumber()]; in computeCrossBlockCriticalPath()
770 unsigned Len = LIR.Height + Cycles[DefMI].Depth; in computeCrossBlockCriticalPath()
838 BlockInfo[Dep.DefMI->getParent()->getNumber()]; in computeInstrDepths()
843 unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth; in computeInstrDepths()
845 if (!Dep.DefMI->isTransient()) in computeInstrDepths()
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DRegisterCoalescer.cpp664 MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def); in removeCopyByCommutingDef() local
665 if (!DefMI) in removeCopyByCommutingDef()
667 if (!DefMI->isCommutable()) in removeCopyByCommutingDef()
671 int DefIdx = DefMI->findRegisterDefOperandIdx(IntA.reg); in removeCopyByCommutingDef()
674 if (!DefMI->isRegTiedToUseOperand(DefIdx, &UseOpIdx)) in removeCopyByCommutingDef()
687 if (!TII->findCommutedOpIndices(*DefMI, UseOpIdx, NewDstIdx)) in removeCopyByCommutingDef()
690 MachineOperand &NewDstMO = DefMI->getOperand(NewDstIdx); in removeCopyByCommutingDef()
715 << *DefMI); in removeCopyByCommutingDef()
719 MachineBasicBlock *MBB = DefMI->getParent(); in removeCopyByCommutingDef()
721 TII->commuteInstruction(*DefMI, false, UseOpIdx, NewDstIdx); in removeCopyByCommutingDef()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetSchedule.cpp186 const MachineInstr *DefMI, unsigned DefOperIdx, in computeOperandLatency() argument
190 return TII->defaultDefLatency(SchedModel, *DefMI); in computeOperandLatency()
195 OperLatency = TII->getOperandLatency(&InstrItins, *DefMI, DefOperIdx, in computeOperandLatency()
199 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
206 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, *DefMI); in computeOperandLatency()
214 std::max(InstrLatency, TII->defaultDefLatency(SchedModel, *DefMI)); in computeOperandLatency()
218 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOperandLatency()
219 unsigned DefIdx = findDefIdx(DefMI, DefOperIdx); in computeOperandLatency()
242 if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit() in computeOperandLatency()
243 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() in computeOperandLatency()
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DLiveRangeEdit.cpp72 const MachineInstr *DefMI, in checkRematerializable() argument
74 assert(DefMI && "Missing instruction"); in checkRematerializable()
76 if (!TII.isTriviallyReMaterializable(*DefMI, aa)) in checkRematerializable()
91 MachineInstr *DefMI = LIS.getInstructionFromIndex(OrigVNI->def); in scanRemattable() local
92 if (!DefMI) in scanRemattable()
94 checkRematerializable(OrigVNI, DefMI, aa); in scanRemattable()
188 MachineInstr *DefMI = nullptr, *UseMI = nullptr; in foldAsLoad() local
194 if (DefMI && DefMI != MI) in foldAsLoad()
198 DefMI = MI; in foldAsLoad()
208 if (!DefMI || !UseMI) in foldAsLoad()
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DMachineTraceMetrics.cpp629 const MachineInstr *DefMI; member
633 DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp) in DataDep()
634 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {} in DataDep()
642 DefMI = DefI->getParent(); in DataDep()
772 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); in computeCrossBlockCriticalPath() local
774 const TraceBlockInfo &DefTBI = BlockInfo[DefMI->getParent()->getNumber()]; in computeCrossBlockCriticalPath()
777 unsigned Len = LIR.Height + Cycles[DefMI].Depth; in computeCrossBlockCriticalPath()
797 BlockInfo[Dep.DefMI->getParent()->getNumber()]; in updateDepth()
802 unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth; in updateDepth()
804 if (!Dep.DefMI->isTransient()) in updateDepth()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/
DLegalizationArtifactCombiner.h39 if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_TRUNC, in tryCombineAnyExt() local
43 unsigned SrcReg = DefMI->getOperand(1).getReg(); in tryCombineAnyExt()
47 markInstAndDefDead(MI, *DefMI, DeadInsts); in tryCombineAnyExt()
58 if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_TRUNC, in tryCombineZExt() local
71 unsigned TruncSrc = DefMI->getOperand(1).getReg(); in tryCombineZExt()
75 markInstAndDefDead(MI, *DefMI, DeadInsts); in tryCombineZExt()
86 if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_TRUNC, in tryCombineSExt() local
100 unsigned TruncSrcReg = DefMI->getOperand(1).getReg(); in tryCombineSExt()
106 markInstAndDefDead(MI, *DefMI, DeadInsts); in tryCombineSExt()
120 if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, in tryFoldImplicitDef() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64CondBrTuning.cpp67 bool tryToTuneBranch(MachineInstr &MI, MachineInstr &DefMI);
144 MachineInstr &DefMI) { in tryToTuneBranch() argument
146 if (MI.getParent() != DefMI.getParent()) in tryToTuneBranch()
152 switch (DefMI.getOpcode()) { in tryToTuneBranch()
198 MachineBasicBlock::iterator I(DefMI), E(MI); in tryToTuneBranch()
205 LLVM_DEBUG(DefMI.print(dbgs())); in tryToTuneBranch()
209 NewCmp = convertToFlagSetting(DefMI, IsFlagSetting); in tryToTuneBranch()
257 MachineBasicBlock::iterator I(DefMI), E(MI); in tryToTuneBranch()
264 LLVM_DEBUG(DefMI.print(dbgs())); in tryToTuneBranch()
268 NewCmp = convertToFlagSetting(DefMI, IsFlagSetting); in tryToTuneBranch()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/
DLiveRangeEdit.cpp45 const MachineInstr *DefMI, in checkRematerializable() argument
48 assert(DefMI && "Missing instruction"); in checkRematerializable()
50 if (!tii.isTriviallyReMaterializable(DefMI, aa)) in checkRematerializable()
64 MachineInstr *DefMI = lis.getInstructionFromIndex(VNI->def); in scanRemattable() local
65 if (!DefMI) in scanRemattable()
67 checkRematerializable(VNI, DefMI, tii, aa); in scanRemattable()
167 MachineInstr *DefMI = 0, *UseMI = 0; in foldAsLoad() local
175 if (DefMI && DefMI != MI) in foldAsLoad()
179 DefMI = MI; in foldAsLoad()
189 if (!DefMI || !UseMI) in foldAsLoad()
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DPHIElimination.cpp134 MachineInstr *DefMI = *I; in runOnMachineFunction() local
135 unsigned DefReg = DefMI->getOperand(0).getReg(); in runOnMachineFunction()
137 DefMI->eraseFromParent(); in runOnMachineFunction()
176 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg); in isSourceDefinedByImplicitDef() local
177 if (!DefMI || !DefMI->isImplicitDef()) in isSourceDefinedByImplicitDef()
297 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); in LowerAtomicPHINode() local
298 if (DefMI->isImplicitDef()) { in LowerAtomicPHINode()
299 ImpDefs.insert(DefMI); in LowerAtomicPHINode()
DTwoAddressInstructionPass.cpp91 MachineInstr *MI, MachineInstr *DefMI,
308 MachineInstr *MI, MachineInstr *DefMI, in isProfitableToReMat() argument
334 return MBB == DefMI->getParent(); in isProfitableToReMat()
429 MachineInstr *DefMI = &MI; in isKilled() local
431 if (!DefMI->killsRegister(Reg)) in isKilled()
440 DefMI = &*Begin; in isKilled()
445 if (!isCopyToReg(*DefMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) in isKilled()
1176 MachineInstr *DefMI = MRI->getVRegDef(regB); in runOnMachineFunction() local
1179 if (DefMI && in runOnMachineFunction()
1180 DefMI->getDesc().isAsCheapAsAMove() && in runOnMachineFunction()
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/external/llvm/lib/Target/PowerPC/
DPPCMIPeephole.cpp126 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode() local
130 if (DefMI && DefMI->getOpcode() == PPC::XXPERMDI) { in simplifyCode()
131 unsigned FeedImmed = DefMI->getOperand(3).getImm(); in simplifyCode()
133 = lookThruCopyLike(DefMI->getOperand(1).getReg()); in simplifyCode()
135 = lookThruCopyLike(DefMI->getOperand(2).getReg()); in simplifyCode()
156 MI.getOperand(1).setReg(DefMI->getOperand(1).getReg()); in simplifyCode()
157 MI.getOperand(2).setReg(DefMI->getOperand(2).getReg()); in simplifyCode()
169 .addOperand(DefMI->getOperand(1)); in simplifyCode()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DMLxExpansionPass.cpp92 MachineInstr *DefMI = MRI->getVRegDef(Reg); in getAccDefMI() local
94 if (DefMI->getParent() != MBB) in getAccDefMI()
96 if (DefMI->isCopyLike()) { in getAccDefMI()
97 Reg = DefMI->getOperand(1).getReg(); in getAccDefMI()
99 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
102 } else if (DefMI->isInsertSubreg()) { in getAccDefMI()
103 Reg = DefMI->getOperand(2).getReg(); in getAccDefMI()
105 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
111 return DefMI; in getAccDefMI()
160 MachineInstr *DefMI = getAccDefMI(MI); in FindMLxHazard() local
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DARMHazardRecognizer.cpp19 static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, in hasRAWHazard() argument
30 return MI->readsRegister(DefMI->getOperand(0).getReg(), &TRI); in hasRAWHazard()
48 MachineInstr *DefMI = LastMI; in getHazardType() local
58 DefMI = &*I; in getHazardType()
62 if (TII.isFpMLxInstruction(DefMI->getOpcode()) && in getHazardType()
64 hasRAWHazard(DefMI, MI, TRI))) { in getHazardType()
/external/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp317 for (auto DefMI : List) { in chooseBestLEA() local
319 int64_t AddrDispShiftTemp = getAddrDispShift(MI, MemOpNo, *DefMI, 1); in chooseBestLEA()
331 MRI->getRegClass(DefMI->getOperand(0).getReg())) in chooseBestLEA()
338 int DistTemp = calcInstrDist(*DefMI, MI); in chooseBestLEA()
348 BestLEA = DefMI; in chooseBestLEA()
487 MachineInstr *DefMI; in removeRedundantAddrCalc() local
490 if (!chooseBestLEA(LEAs[getMemOpKey(MI, MemOpNo)], MI, DefMI, AddrDispShift, in removeRedundantAddrCalc()
501 DefMI->removeFromParent(); in removeRedundantAddrCalc()
502 MBB->insert(MachineBasicBlock::iterator(&MI), DefMI); in removeRedundantAddrCalc()
503 InstrPos[DefMI] = InstrPos[&MI] - 1; in removeRedundantAddrCalc()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp344 for (auto DefMI : List) { in chooseBestLEA() local
346 int64_t AddrDispShiftTemp = getAddrDispShift(MI, MemOpNo, *DefMI, 1); in chooseBestLEA()
358 MRI->getRegClass(DefMI->getOperand(0).getReg())) in chooseBestLEA()
365 int DistTemp = calcInstrDist(*DefMI, MI); in chooseBestLEA()
375 BestLEA = DefMI; in chooseBestLEA()
514 MachineInstr *DefMI; in removeRedundantAddrCalc() local
517 if (!chooseBestLEA(LEAs[getMemOpKey(MI, MemOpNo)], MI, DefMI, AddrDispShift, in removeRedundantAddrCalc()
528 DefMI->removeFromParent(); in removeRedundantAddrCalc()
529 MBB->insert(MachineBasicBlock::iterator(&MI), DefMI); in removeRedundantAddrCalc()
530 InstrPos[DefMI] = InstrPos[&MI] - 1; in removeRedundantAddrCalc()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCMIPeephole.cpp306 MachineInstr *DefMI = MRI->getVRegDef(TrueReg1); in simplifyCode() local
307 unsigned DefOpc = DefMI ? DefMI->getOpcode() : 0; in simplifyCode()
317 TRI->lookThruCopyLike(DefMI->getOperand(1).getReg(), MRI); in simplifyCode()
325 if (DefMI && (Immed == 0 || Immed == 3)) { in simplifyCode()
341 unsigned FeedImmed = DefMI->getOperand(3).getImm(); in simplifyCode()
343 TRI->lookThruCopyLike(DefMI->getOperand(1).getReg(), MRI); in simplifyCode()
345 TRI->lookThruCopyLike(DefMI->getOperand(2).getReg(), MRI); in simplifyCode()
365 MI.getOperand(1).setReg(DefMI->getOperand(1).getReg()); in simplifyCode()
366 MI.getOperand(2).setReg(DefMI->getOperand(2).getReg()); in simplifyCode()
378 .add(DefMI->getOperand(1)); in simplifyCode()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsOptimizePICCall.cpp283 MachineInstr *DefMI = MRI.getVRegDef(Reg); in isCallViaRegister() local
285 assert(DefMI); in isCallViaRegister()
289 if (!DefMI->mayLoad() || DefMI->getNumOperands() < 3) in isCallViaRegister()
292 unsigned Flags = DefMI->getOperand(2).getTargetFlags(); in isCallViaRegister()
298 assert(DefMI->hasOneMemOperand()); in isCallViaRegister()
299 Val = (*DefMI->memoperands_begin())->getValue(); in isCallViaRegister()
301 Val = (*DefMI->memoperands_begin())->getPseudoValue(); in isCallViaRegister()
/external/llvm/lib/Target/Mips/
DMipsOptimizePICCall.cpp261 MachineInstr *DefMI = MRI.getVRegDef(Reg); in isCallViaRegister() local
263 assert(DefMI); in isCallViaRegister()
267 if (!DefMI->mayLoad() || DefMI->getNumOperands() < 3) in isCallViaRegister()
270 unsigned Flags = DefMI->getOperand(2).getTargetFlags(); in isCallViaRegister()
276 assert(DefMI->hasOneMemOperand()); in isCallViaRegister()
277 Val = (*DefMI->memoperands_begin())->getValue(); in isCallViaRegister()
279 Val = (*DefMI->memoperands_begin())->getPseudoValue(); in isCallViaRegister()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DUtils.cpp211 auto *DefMI = MRI.getVRegDef(Reg); in getOpcodeDef() local
212 auto DstTy = MRI.getType(DefMI->getOperand(0).getReg()); in getOpcodeDef()
215 while (DefMI->getOpcode() == TargetOpcode::COPY) { in getOpcodeDef()
216 unsigned SrcReg = DefMI->getOperand(1).getReg(); in getOpcodeDef()
220 DefMI = MRI.getVRegDef(SrcReg); in getOpcodeDef()
222 return DefMI->getOpcode() == Opcode ? DefMI : nullptr; in getOpcodeDef()

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