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Searched refs:Disp (Results 1 – 25 of 106) sorted by relevance

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/external/swiftshader/third_party/subzero/src/
DIceInstX8664.cpp94 int32_t Disp = Var->getStackOffset(); in getRematerializableOffset() local
97 Disp += Target->getFrameFixedAllocaOffset(); in getRematerializableOffset()
101 return Disp; in getRematerializableOffset()
113 int32_t Disp = 0; in emit() local
115 Disp += getRematerializableOffset(getBase(), Target); in emit()
125 if (getOffset() == nullptr && Disp == 0) { in emit()
127 } else if (getOffset() == nullptr && Disp != 0) { in emit()
128 Str << Disp; in emit()
130 if (Base == nullptr || CI->getValue() || Disp != 0) in emit()
132 Str << CI->getValue() + Disp; in emit()
[all …]
DIceInstX8632.cpp104 int32_t Disp = Var->getStackOffset(); in getRematerializableOffset() local
107 Disp += Target->getFrameFixedAllocaOffset(); in getRematerializableOffset()
111 return Disp; in getRematerializableOffset()
140 int32_t Disp = 0; in emit() local
142 Disp += getRematerializableOffset(getBase(), Target); in emit()
156 if (getOffset() == nullptr && Disp == 0) { in emit()
158 } else if (getOffset() == nullptr && Disp != 0) { in emit()
159 Str << Disp; in emit()
161 if (getBase() == nullptr || CI->getValue() || Disp != 0) in emit()
163 Str << CI->getValue() + Disp; in emit()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() local
188 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
189 return (Base << 12) | Disp; in getBDAddr12Encoding()
197 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() local
198 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
199 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
207 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() local
209 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
210 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
218 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr20Encoding() local
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp48 int64_t Disp; member
52 : BaseType(RegBase), IndexReg(), Disp(0), isRI(RI) { in SystemZRRIAddressMode()
72 errs() << " Disp " << Disp << '\n'; in dump()
86 SDValue &Base, SDValue &Disp);
88 SDValue &Base, SDValue &Disp,
124 SDValue &Base, SDValue &Disp);
126 SDValue &Base, SDValue &Disp,
128 bool SelectAddrRI(SDValue& Addr, SDValue &Base, SDValue &Disp);
130 SDValue &Base, SDValue &Disp, SDValue &Index);
132 SDValue &Base, SDValue &Disp, SDValue &Index);
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp152 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() local
153 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
154 return (Base << 12) | Disp; in getBDAddr12Encoding()
162 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() local
163 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
164 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
172 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() local
174 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
175 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
183 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr20Encoding() local
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/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp59 int64_t Disp; member
64 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
90 errs() << " Disp " << Disp; in dump()
158 SDValue &Base, SDValue &Disp) const;
160 SDValue &Base, SDValue &Disp, SDValue &Index) const;
166 SDValue &Base, SDValue &Disp) const;
172 SDValue &Base, SDValue &Disp) const;
179 SDValue &Base, SDValue &Disp, SDValue &Index) const;
191 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Only()
192 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp); in selectBDAddr12Only()
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/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DGPRArith.cpp112 #define TestLeaBaseDisp(Base, BaseValue, Disp, Dst) \ in TEST_F() argument
121 Address(Encoded_GPR_##Base(), Disp, AssemblerFixup::NoFixup)); \ in TEST_F()
124 ASSERT_EQ(test.Base##d() + (Disp), test.Dst##d()) \ in TEST_F()
125 << TestString << " with Disp " << Disp; \ in TEST_F()
129 #define TestLeaIndex32bitDisp(Index, IndexValue, Disp, Dst0, Dst1, Dst2, Dst3) \ in TEST_F() argument
138 Address(Encoded_GPR_##Index(), Traits::TIMES_1, Disp, \ in TEST_F()
141 Address(Encoded_GPR_##Index(), Traits::TIMES_2, Disp, \ in TEST_F()
144 Address(Encoded_GPR_##Index(), Traits::TIMES_4, Disp, \ in TEST_F()
147 Address(Encoded_GPR_##Index(), Traits::TIMES_8, Disp, \ in TEST_F()
151 ASSERT_EQ((test.Index##d() << Traits::TIMES_1) + (Disp), test.Dst0##d()) \ in TEST_F()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp60 int64_t Disp; member
65 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
91 errs() << " Disp " << Disp; in dump()
159 SDValue &Base, SDValue &Disp) const;
161 SDValue &Base, SDValue &Disp, SDValue &Index) const;
167 SDValue &Base, SDValue &Disp) const;
173 SDValue &Base, SDValue &Disp) const;
180 SDValue &Base, SDValue &Disp, SDValue &Index) const;
192 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Only()
193 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp); in selectBDAddr12Only()
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/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp47 int16_t Disp; member
56 : BaseType(RegBase), Disp(0), GV(nullptr), CP(nullptr), in MSP430ISelAddressMode()
72 errs() << " Disp " << Disp << '\n'; in dump()
118 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
144 AM.Disp += G->getOffset(); in MatchWrapper()
149 AM.Disp += CP->getOffset(); in MatchWrapper()
186 AM.Disp += Val; in MatchAddress()
229 AM.Disp += Offset; in MatchAddress()
244 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
263 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp48 int16_t Disp; member
57 : BaseType(RegBase), Disp(0), GV(nullptr), CP(nullptr), in MSP430ISelAddressMode()
74 errs() << " Disp " << Disp << '\n'; in dump()
121 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
147 AM.Disp += G->getOffset(); in MatchWrapper()
152 AM.Disp += CP->getOffset(); in MatchWrapper()
189 AM.Disp += Val; in MatchAddress()
232 AM.Disp += Offset; in MatchAddress()
247 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
266 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp46 int16_t Disp; member
55 : BaseType(RegBase), Disp(0), GV(0), CP(0), BlockAddr(0), in MSP430ISelAddressMode()
71 errs() << " Disp " << Disp << '\n'; in dump()
123 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
149 AM.Disp += G->getOffset(); in MatchWrapper()
154 AM.Disp += CP->getOffset(); in MatchWrapper()
191 AM.Disp += Val; in MatchAddress()
234 AM.Disp += Offset; in MatchAddress()
249 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
266 Disp = CurDAG->getTargetGlobalAddress(AM.GV, N->getDebugLoc(), in SelectAddr()
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/external/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp71 const MachineOperand *Disp) in MemOpKey() argument
72 : Disp(Disp) { in MemOpKey()
89 return isSimilarDispOp(*Disp, *Other.Disp); in operator ==()
96 const MachineOperand *Disp; member in MemOpKey
119 assert(Val.Disp != PtrInfo::getEmptyKey() && "Cannot hash the empty key"); in getHashValue()
120 assert(Val.Disp != PtrInfo::getTombstoneKey() && in getHashValue()
130 switch (Val.Disp->getType()) { in getHashValue()
135 Hash = hash_combine(Hash, Val.Disp->getIndex()); in getHashValue()
138 Hash = hash_combine(Hash, Val.Disp->getSymbolName()); in getHashValue()
141 Hash = hash_combine(Hash, Val.Disp->getGlobal()); in getHashValue()
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DX86InstrBuilder.h50 int Disp; member
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
77 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
109 AM.Disp = Op.getImm(); in getAddressFromInstr()
164 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
166 MIB.addImm(AM.Disp); in addFullAddress()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp83 const MachineOperand *Disp) in MemOpKey() argument
84 : Disp(Disp) { in MemOpKey()
101 return isSimilarDispOp(*Disp, *Other.Disp); in operator ==()
108 const MachineOperand *Disp; member in __anon88dc7a5a0111::MemOpKey
134 assert(Val.Disp != PtrInfo::getEmptyKey() && "Cannot hash the empty key"); in getHashValue()
135 assert(Val.Disp != PtrInfo::getTombstoneKey() && in getHashValue()
145 switch (Val.Disp->getType()) { in getHashValue()
150 Hash = hash_combine(Hash, Val.Disp->getIndex()); in getHashValue()
153 Hash = hash_combine(Hash, Val.Disp->getSymbolName()); in getHashValue()
156 Hash = hash_combine(Hash, Val.Disp->getGlobal()); in getHashValue()
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DX86InstrBuilder.h56 int Disp; member
61 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
82 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
84 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
115 AM.Disp = Op3.getImm(); in getAddressFromInstr()
186 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
188 MIB.addImm(AM.Disp); in addFullAddress()
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DGPRArith.cpp124 #define TestLeaBaseDisp(Base, BaseValue, Disp, Dst) \ in TEST_F() argument
134 Address(GPRRegister::Encoded_Reg_##Base, Disp, \ in TEST_F()
138 ASSERT_EQ(test.Base() + (Disp), test.Dst()) << TestString << " with Disp " \ in TEST_F()
139 << Disp; \ in TEST_F()
143 #define TestLeaIndex32bitDisp(Index, IndexValue, Disp, Dst0, Dst1, Dst2, Dst3) \ in TEST_F() argument
151 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_1, Disp, \ in TEST_F()
154 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_2, Disp, \ in TEST_F()
157 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_4, Disp, \ in TEST_F()
160 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_8, Disp, \ in TEST_F()
164 ASSERT_EQ((test.Index() << Traits::TIMES_1) + (Disp), test.Dst0()) \ in TEST_F()
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/external/capstone/arch/SystemZ/
DSystemZDisassembler.c189 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
193 MCOperand_CreateImm0(Inst, Disp); in decodeBDAddr12Operand()
202 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
206 MCOperand_CreateImm0(Inst, SignExtend64(Disp, 20)); in decodeBDAddr20Operand()
215 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
219 MCOperand_CreateImm0(Inst, Disp); in decodeBDXAddr12Operand()
230 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
234 MCOperand_CreateImm0(Inst, SignExtend64(Disp, 20)); in decodeBDXAddr20Operand()
245 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len8Operand() local
249 MCOperand_CreateImm0(Inst, Disp); in decodeBDLAddr12Len8Operand()
DSystemZInstPrinter.c42 static void printAddress(MCInst *MI, unsigned Base, int64_t Disp, unsigned Index, SStream *O) in printAddress() argument
44 if (Disp >= 0) { in printAddress()
45 if (Disp > HEX_THRESHOLD) in printAddress()
46 SStream_concat(O, "0x%"PRIx64, Disp); in printAddress()
48 SStream_concat(O, "%"PRIu64, Disp); in printAddress()
50 if (Disp < -HEX_THRESHOLD) in printAddress()
51 SStream_concat(O, "-0x%"PRIx64, -Disp); in printAddress()
53 SStream_concat(O, "-%"PRIu64, -Disp); in printAddress()
66 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp; in printAddress()
72 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Disp; in printAddress()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/Disassembler/
DSystemZDisassembler.cpp295 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
298 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand()
305 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
308 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
316 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
319 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand()
328 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
331 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
340 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len4Operand() local
343 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len4Operand()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp63 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
76 if (Disp.isExpr()) in printSrcMemOperand()
77 O << *Disp.getExpr(); in printSrcMemOperand()
79 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
80 O << Disp.getImm(); in printSrcMemOperand()
/external/llvm/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp65 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
78 if (Disp.isExpr()) in printSrcMemOperand()
79 Disp.getExpr()->print(O, &MAI); in printSrcMemOperand()
81 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
82 O << Disp.getImm(); in printSrcMemOperand()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp65 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
78 if (Disp.isExpr()) in printSrcMemOperand()
79 Disp.getExpr()->print(O, &MAI); in printSrcMemOperand()
81 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
82 O << Disp.getImm(); in printSrcMemOperand()
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.cpp310 const MCExpr *Disp = MCConstantExpr::create(0, Ctx); in InstrumentMOVSBase() local
312 getPointerWidth(), 0, Disp, SrcReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
319 const MCExpr *Disp = MCConstantExpr::create(-1, Ctx); in InstrumentMOVSBase() local
321 getPointerWidth(), 0, Disp, SrcReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
329 const MCExpr *Disp = MCConstantExpr::create(0, Ctx); in InstrumentMOVSBase() local
331 getPointerWidth(), 0, Disp, DstReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
337 const MCExpr *Disp = MCConstantExpr::create(-1, Ctx); in InstrumentMOVSBase() local
339 getPointerWidth(), 0, Disp, DstReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
455 const MCConstantExpr *Disp = in ComputeMemOperandAddress() local
458 X86Operand::CreateMem(getPointerWidth(), 0, Disp, Reg, 0, 1, SMLoc(), in ComputeMemOperandAddress()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.cpp323 const MCExpr *Disp = MCConstantExpr::create(0, Ctx); in InstrumentMOVSBase() local
325 getPointerWidth(), 0, Disp, SrcReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
332 const MCExpr *Disp = MCConstantExpr::create(-1, Ctx); in InstrumentMOVSBase() local
334 getPointerWidth(), 0, Disp, SrcReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
342 const MCExpr *Disp = MCConstantExpr::create(0, Ctx); in InstrumentMOVSBase() local
344 getPointerWidth(), 0, Disp, DstReg, 0, AccessSize, SMLoc(), SMLoc())); in InstrumentMOVSBase()
350 const MCExpr *Disp = MCConstantExpr::create(-1, Ctx); in InstrumentMOVSBase() local
352 getPointerWidth(), 0, Disp, DstReg, CntReg, AccessSize, SMLoc(), in InstrumentMOVSBase()
468 const MCConstantExpr *Disp = in ComputeMemOperandAddress() local
471 X86Operand::CreateMem(getPointerWidth(), 0, Disp, Reg, 0, 1, SMLoc(), in ComputeMemOperandAddress()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrBuilder.h51 int Disp; member
56 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) { in X86AddressMode()
77 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
136 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
138 MIB.addImm(AM.Disp); in addFullAddress()

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