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Searched refs:Dispatch (Results 1 – 25 of 140) sorted by relevance

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/external/vulkan-headers/include/vulkan/
Dvulkan.hpp495 template <typename Type, typename Dispatch> class UniqueHandleTraits;
497 template <typename Type, typename Dispatch>
498 class UniqueHandle : public UniqueHandleTraits<Type,Dispatch>::deleter
501 using Deleter = typename UniqueHandleTraits<Type,Dispatch>::deleter;
580 void swap( UniqueHandle<Type,Dispatch> & rhs ) in swap()
590 template <typename Type, typename Dispatch>
591 …VULKAN_HPP_INLINE void swap( UniqueHandle<Type,Dispatch> & lhs, UniqueHandle<Type,Dispatch> & rhs ) in swap()
2378 template <typename OwnerType, typename Dispatch>
2382 …l<const AllocationCallbacks> allocationCallbacks = nullptr, Dispatch const &dispatch = Dispatch() ) in ObjectDestroy()
2401 Dispatch const* m_dispatch;
[all …]
/external/swiftshader/include/vulkan/
Dvulkan.hpp379 template <typename Type, typename Dispatch> class UniqueHandleTraits;
381 template <typename Type, typename Dispatch>
382 class UniqueHandle : public UniqueHandleTraits<Type,Dispatch>::deleter
385 using Deleter = typename UniqueHandleTraits<Type,Dispatch>::deleter;
464 void swap( UniqueHandle<Type,Dispatch> & rhs ) in swap()
474 template <typename Type, typename Dispatch>
475 …VULKAN_HPP_INLINE void swap( UniqueHandle<Type,Dispatch> & lhs, UniqueHandle<Type,Dispatch> & rhs ) in swap()
2513 template <typename OwnerType, typename Dispatch>
2517 …l<const AllocationCallbacks> allocationCallbacks = nullptr, Dispatch const &dispatch = Dispatch() ) in ObjectDestroy()
2536 Dispatch const* m_dispatch;
[all …]
/external/v8/src/interpreter/
Dinterpreter-generator.cc62 Dispatch(); in IGNITION_HANDLER()
71 Dispatch(); in IGNITION_HANDLER()
80 Dispatch(); in IGNITION_HANDLER()
88 Dispatch(); in IGNITION_HANDLER()
96 Dispatch(); in IGNITION_HANDLER()
104 Dispatch(); in IGNITION_HANDLER()
112 Dispatch(); in IGNITION_HANDLER()
120 Dispatch(); in IGNITION_HANDLER()
129 Dispatch(); in IGNITION_HANDLER()
138 Dispatch(); in IGNITION_HANDLER()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/
Dcpus.s19 # BROADWELL-NEXT: Dispatch Width: 4
20 # BTVER2-NEXT: Dispatch Width: 2
21 # HASWELL-NEXT: Dispatch Width: 4
22 # IVYBRIDGE-NEXT: Dispatch Width: 4
23 # KNL-NEXT: Dispatch Width: 4
24 # SANDYBRIDGE-NEXT: Dispatch Width: 4
25 # SKX-NEXT: Dispatch Width: 6
26 # SKX-AVX512-NEXT: Dispatch Width: 6
27 # SLM-NEXT: Dispatch Width: 2
28 # ZNVER1-NEXT: Dispatch Width: 4
Dvariable-blend-read-after-ld-1.s23 # BDWELL-NEXT: Dispatch Width: 4
28 # BTVER2-NEXT: Dispatch Width: 2
33 # HASWELL-NEXT: Dispatch Width: 4
38 # IVY-NEXT: Dispatch Width: 4
43 # SANDY-NEXT: Dispatch Width: 4
48 # SKYLAKE-NEXT: Dispatch Width: 6
53 # ZNVER1-NEXT: Dispatch Width: 4
Dvariable-blend-read-after-ld-2.s23 # BDWELL-NEXT: Dispatch Width: 4
28 # BTVER2-NEXT: Dispatch Width: 2
33 # HASWELL-NEXT: Dispatch Width: 4
38 # IVY-NEXT: Dispatch Width: 4
43 # SANDY-NEXT: Dispatch Width: 4
48 # SKYLAKE-NEXT: Dispatch Width: 6
53 # ZNVER1-NEXT: Dispatch Width: 4
Dfma3-read-after-ld-2.s17 # BDWELL-NEXT: Dispatch Width: 4
21 # HASWELL-NEXT: Dispatch Width: 4
25 # SKYLAKE-NEXT: Dispatch Width: 6
29 # ZNVER1-NEXT: Dispatch Width: 4
Dfma3-read-after-ld-1.s17 # BDWELL-NEXT: Dispatch Width: 4
21 # HASWELL-NEXT: Dispatch Width: 4
25 # SKYLAKE-NEXT: Dispatch Width: 6
29 # ZNVER1-NEXT: Dispatch Width: 4
Dbextr-read-after-ld.s15 # BDWELL-NEXT: Dispatch Width: 4
20 # BTVER2-NEXT: Dispatch Width: 2
25 # HASWELL-NEXT: Dispatch Width: 4
30 # SKYLAKE-NEXT: Dispatch Width: 6
35 # ZNVER1-NEXT: Dispatch Width: 4
Dbzhi-read-after-ld.s14 # BDWELL-NEXT: Dispatch Width: 4
19 # HASWELL-NEXT: Dispatch Width: 4
24 # SKYLAKE-NEXT: Dispatch Width: 6
29 # ZNVER1-NEXT: Dispatch Width: 4
Doption-all-stats-1.s12 # FULLREPORT-NEXT: Dispatch Width: 2
27 # FULLREPORT: Dynamic Dispatch Stall Cycles:
35 # FULLREPORT: Dispatch Logic - number of cycles where we saw N instructions dispatched:
Dllvm-mca-markers-5.s21 # CHECK-NEXT: Dispatch Width: 2
41 # CHECK-NEXT: Dispatch Width: 2
61 # CHECK-NEXT: Dispatch Width: 2
Doption-all-views-1.s14 # DEFAULTREPORT-NEXT: Dispatch Width: 2
29 # FULLREPORT: Dynamic Dispatch Stall Cycles:
37 # FULLREPORT: Dispatch Logic - number of cycles where we saw N instructions dispatched:
Doption-all-stats-2.s13 # ALL-NEXT: Dispatch Width: 2
28 # FULL: Dynamic Dispatch Stall Cycles:
36 # FULL: Dispatch Logic - number of cycles where we saw N instructions dispatched:
Doption-all-views-2.s13 # ALL-NEXT: Dispatch Width: 2
28 # ALL: Dynamic Dispatch Stall Cycles:
36 # ALL: Dispatch Logic - number of cycles where we saw N instructions dispatched:
Ddispatch_width.s12 # CUSTOM-NEXT: Dispatch Width: 1
13 # DEFAULT-NEXT: Dispatch Width: 2
/external/toolchain-utils/cros_utils/
Dstats.py237 class Dispatch: class
1916 geometricmean = Dispatch((lgeometricmean, (ListType, TupleType)),)
1917 harmonicmean = Dispatch((lharmonicmean, (ListType, TupleType)),)
1918 mean = Dispatch((lmean, (ListType, TupleType)),)
1919 median = Dispatch((lmedian, (ListType, TupleType)),)
1920 medianscore = Dispatch((lmedianscore, (ListType, TupleType)),)
1921 mode = Dispatch((lmode, (ListType, TupleType)),)
1924 moment = Dispatch((lmoment, (ListType, TupleType)),)
1925 variation = Dispatch((lvariation, (ListType, TupleType)),)
1926 skew = Dispatch((lskew, (ListType, TupleType)),)
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyFixIrreducibleControlFlow.cpp184 MachineBasicBlock *Dispatch = MF.CreateMachineBasicBlock(); in VisitLoop() local
185 MF.insert(MF.end(), Dispatch); in VisitLoop()
186 MLI.changeLoopFor(Dispatch, Loop); in VisitLoop()
190 MachineInstrBuilder MIB = BuildMI(*Dispatch, Dispatch->end(), DebugLoc(), in VisitLoop()
219 Dispatch->addSuccessor(MBB); in VisitLoop()
248 .addMBB(Dispatch); in VisitLoop()
249 Split->addSuccessor(Dispatch); in VisitLoop()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyFixIrreducibleControlFlow.cpp181 MachineBasicBlock *Dispatch = MF.CreateMachineBasicBlock(); in VisitLoop() local
182 MF.insert(MF.end(), Dispatch); in VisitLoop()
183 MLI.changeLoopFor(Dispatch, Loop); in VisitLoop()
187 MachineInstrBuilder MIB = BuildMI(*Dispatch, Dispatch->end(), DebugLoc(), in VisitLoop()
216 Dispatch->addSuccessor(MBB); in VisitLoop()
245 .addMBB(Dispatch); in VisitLoop()
246 Split->addSuccessor(Dispatch); in VisitLoop()
/external/perfetto/ui/src/frontend/
Dglobals.ts22 type Dispatch = (action: DeferredAction) => void; alias
55 private _dispatch?: Dispatch = undefined;
69 initialize(dispatch: Dispatch, controllerWorker: Worker) {
93 get dispatch(): Dispatch {
/external/icu/icu4j/tools/misc/src/com/ibm/icu/dev/tool/ime/translit/
DTransliterator.properties17 activeError=Dispatch method called while the IME was inactive
18 disposedError=Dispatch called after IME was disposed
19 inputError=Dispatch called without an InputEvent
/external/libdrm/intel/tests/
Dgen6-3d.batch-ref.txt68 0x1230010c: 0x00100800: Dispatch GRF start 1, VUE read length 1, VUE read offset 0
83 0x12300148: 0x00000001: Dispatch GRF start 1, VUE read length 0, VUE read offset 0
119 0x123001d8: 0x80020002: Depth Clear 0, Depth Resolve 0, HiZ Resolve 0, Dispatch GRF start[0…
120 …axThreads 40, PS KillPixel 0, PS computed Z 0, PS use sourceZ 0, Thread Dispatch 1, PS use sourceW…
121 …, Barycentric interp mode 0x0, Point raster rule 0, Multisample mode 0, Multisample Dispatch mode 0
195 0x12300308: 0x00100800: Dispatch GRF start 1, VUE read length 1, VUE read offset 0
242 0x123003c4: 0x80020000: Depth Clear 0, Depth Resolve 0, HiZ Resolve 0, Dispatch GRF start[0…
243 …axThreads 40, PS KillPixel 0, PS computed Z 0, PS use sourceZ 0, Thread Dispatch 1, PS use sourceW…
244 …, Barycentric interp mode 0x0, Point raster rule 0, Multisample mode 0, Multisample Dispatch mode 0
277 0x12300450: 0x00100800: Dispatch GRF start 1, VUE read length 1, VUE read offset 0
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/BtVer2/
Dregister-files-4.s9 # CHECK-NEXT: Dispatch Width: 2
24 # CHECK: Dynamic Dispatch Stall Cycles:
32 # CHECK: Dispatch Logic - number of cycles where we saw N instructions dispatched:
Dregister-files-3.s9 # CHECK-NEXT: Dispatch Width: 2
24 # CHECK: Dynamic Dispatch Stall Cycles:
32 # CHECK: Dispatch Logic - number of cycles where we saw N instructions dispatched:
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/AArch64/Exynos/
Dscheduler-queue-usage.s11 # M1-NEXT: Dispatch Width: 4
12 # M3-NEXT: Dispatch Width: 6

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