| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/StructurizeCFG/ |
| D | nested-loop-order.ll | 23 br i1 %tmp22, label %ENDLOOP, label %ENDIF
26 ; CHECK: br i1 %{{[0-9]+}}, label %ENDLOOP, label %LOOP.outer
28 ; CHECK: ENDLOOP:
30 ENDLOOP: ; preds = %ENDIF28, %IF29, %LOOP
50 br i1 %tmp32, label %ENDLOOP, label %LOOP
63 br i1 %tmp36, label %ENDLOOP, label %LOOP.outer
|
| /external/llvm/test/Transforms/StructurizeCFG/ |
| D | nested-loop-order.ll | 23 br i1 %tmp22, label %ENDLOOP, label %ENDIF
26 ; CHECK: br i1 %{{[0-9]+}}, label %ENDLOOP, label %LOOP.outer
28 ; CHECK: ENDLOOP:
30 ENDLOOP: ; preds = %ENDIF28, %IF29, %LOOP
50 br i1 %tmp32, label %ENDLOOP, label %LOOP
63 br i1 %tmp36, label %ENDLOOP, label %LOOP.outer
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | si-annotate-cf.ll | 20 ENDLOOP:
25 br i1 %1, label %ENDLOOP, label %ENDIF
|
| D | si-spill-cf.ll | 85 br i1 %67, label %ENDLOOP, label %ENDIF
87 ENDLOOP: ; preds = %ELSE2566, %LOOP
245 br i1 %201, label %ENDLOOP, label %ELSE2593
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | si-annotate-cf.ll | 20 ENDLOOP:
25 br i1 %1, label %ENDLOOP, label %ENDIF
|
| D | si-spill-cf.ll | 86 br i1 %tmp67, label %ENDLOOP, label %ENDIF
88 ENDLOOP: ; preds = %ELSE2566, %LOOP
246 br i1 %tmp201, label %ENDLOOP, label %ELSE2593
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonScheduleV4.td | 33 // to schedule an ENDLOOP with 4 other instructions.
184 // ENDLOOP
|
| D | HexagonHardwareLoops.cpp | 1109 unsigned ENDLOOP; in convertToHardwareLoop() local
1119 ENDLOOP = Hexagon::ENDLOOP1; in convertToHardwareLoop()
1124 ENDLOOP = Hexagon::ENDLOOP0; in convertToHardwareLoop()
1243 BuildMI(*LastMBB, LastI, LastIDL, TII->get(ENDLOOP)).addMBB(LoopStart); in convertToHardwareLoop()
|
| /external/u-boot/include/ |
| D | lattice.h | 187 #define ENDLOOP 0x59 /* The end of the repeat loop. */ macro
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSchedule.td | 20 // to schedule an ENDLOOP with 4 other instructions.
|
| D | HexagonHardwareLoops.cpp | 1148 unsigned ENDLOOP; in convertToHardwareLoop() local
1158 ENDLOOP = Hexagon::ENDLOOP1; in convertToHardwareLoop()
1163 ENDLOOP = Hexagon::ENDLOOP0; in convertToHardwareLoop()
1282 BuildMI(*LastMBB, LastI, LastIDL, TII->get(ENDLOOP)).addMBB(LoopStart); in convertToHardwareLoop()
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_opcode_tmp.h | 118 OP00_LBL(ENDLOOP)
|
| D | tgsi_info_opcodes.h | 102 OPCODE(0, 0, NONE, ENDLOOP, .is_branch = 1, .pre_dedent = 1)
|
| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_opcode_tmp.h | 144 OP00_LBL(ENDLOOP)
|
| /external/swiftshader/src/Pipeline/ |
| D | VertexProgram.hpp | 93 void ENDLOOP();
|
| D | PixelProgram.hpp | 138 void ENDLOOP();
|
| /external/swiftshader/src/Shader/ |
| D | VertexProgram.hpp | 96 void ENDLOOP();
|
| D | PixelProgram.hpp | 139 void ENDLOOP();
|
| /external/u-boot/drivers/fpga/ |
| D | ivm_core.c | 951 case ENDLOOP: in ispVMCode()
1905 if (g_pucHeapMemory[iHeapIndex - 1] != ENDLOOP) { in ispVMLoop()
2274 case ENDLOOP: in ispVMLCOUNT()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | bug6757-endloop.ll | 3 ; Make sure that we can handle loops with multiple ENDLOOP instructions.
|
| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_disasm.c | 495 OPC(ENDLOOP),
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDILCFGStructurizer.cpp | 691 && It->getOpcode() == R600::ENDLOOP) in wrapup()
1440 insertInstrEnd(DstBlk, R600::ENDLOOP, DebugLoc()); in mergeLooplandBlock()
|
| D | R600ControlFlowFinalizer.cpp | 583 case R600::ENDLOOP: { in runOnMachineFunction()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDILCFGStructurizer.cpp | 689 && It->getOpcode() == AMDGPU::ENDLOOP) in wrapup()
1493 insertInstrEnd(DstBlk, AMDGPU::ENDLOOP, DebugLoc()); in mergeLooplandBlock()
|
| D | R600ControlFlowFinalizer.cpp | 568 case AMDGPU::ENDLOOP: { in runOnMachineFunction()
|