Searched refs:EXTSW (Results 1 – 18 of 18) sorted by relevance
/external/pcre/dist2/src/sljit/ |
D | sljitNativePPC_64.c | 126 FAIL_IF(push_inst(compiler, EXTSW | S(src2) | A(TMP_REG2))); \ 133 FAIL_IF(push_inst(compiler, EXTSW | S(src1) | A(TMP_REG1))); \ 137 FAIL_IF(push_inst(compiler, EXTSW | S(src2) | A(TMP_REG2))); \ 144 FAIL_IF(push_inst(compiler, EXTSW | S(src1) | A(TMP_REG1))); \ 164 return push_inst(compiler, EXTSW | S(src2) | A(dst)); in emit_single_op()
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D | sljitNativePPC_common.c | 167 #define EXTSW (HI(31) | LO(986)) macro 1572 FAIL_IF(push_inst(compiler, EXTSW | S(src) | A(TMP_REG1))); in sljit_emit_fop1_conv_f64_from_sw()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCMIPeephole.cpp | 566 case PPC::EXTSW: in simplifyCode() 582 return Opcode == PPC::EXTSW || Opcode == PPC::EXTSW_32_64; in simplifyCode()
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D | PPCInstrVSX.td | 2037 (EXTSW (VEXTUWRX (RLWINM8 $Idx, 2, 28, 29), $S))>; 2039 (EXTSW (VEXTUWRX (LI8 0), $S))>; 2041 (EXTSW (VEXTUWRX (LI8 4), $S))>; 2044 (EXTSW (INSERT_SUBREG (i64 (IMPLICIT_DEF)), 2047 (EXTSW (VEXTUWRX (LI8 12), $S))>; 2156 (EXTSW (VEXTUWLX (RLWINM8 $Idx, 2, 28, 29), $S))>; 2158 (EXTSW (VEXTUWLX (LI8 0), $S))>; 2161 (EXTSW (INSERT_SUBREG (i64 (IMPLICIT_DEF)), 2164 (EXTSW (VEXTUWLX (LI8 8), $S))>; 2166 (EXTSW (VEXTUWLX (LI8 12), $S))>;
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D | PPCInstrInfo.cpp | 290 case PPC::EXTSW: in isCoalescableExtInstr() 3142 Opcode == PPC::EXTSW || Opcode == PPC::EXTSWo || in isSignExtendingOp()
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D | PPCFastISel.cpp | 2337 case PPC::EXTSW: in tryToFoldLoadIntoMI()
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D | PPCInstr64Bit.td | 704 defm EXTSW : XForm_11r<31, 986, (outs g8rc:$rA), (ins g8rc:$rS),
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/external/v8/src/ppc/ |
D | disasm-ppc.cc | 595 case EXTSW: { in DecodeExt2()
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D | assembler-ppc.h | 741 emit(EXT2 | EXTSW | ra.code() * B21 | rs.code() * B16 | rc);
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D | constants-ppc.h | 1224 V(extsw, EXTSW, 0x7C0007B4) \
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D | simulator-ppc.cc | 2075 case EXTSW: { in ExecuteGeneric()
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCInstr64Bit.td | 418 def EXTSW : XForm_11<31, 986, (outs G8RC:$rA), (ins G8RC:$rS), 421 /// EXTSW_32 - Just like EXTSW, but works on '32-bit' registers.
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.cpp | 254 case PPC::EXTSW: in isCoalescableExtInstr() 1568 MIOpC == PPC::EXTSW || MIOpC == PPC::EXTSWo) { in optimizeCompareInstr()
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D | PPCFastISel.cpp | 2231 case PPC::EXTSW: in tryToFoldLoadIntoMI()
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D | PPCInstr64Bit.td | 628 defm EXTSW : XForm_11r<31, 986, (outs g8rc:$rA), (ins g8rc:$rS),
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/external/capstone/arch/PowerPC/ |
D | PPCGenDisassemblerTables.inc | 1341 /* 5527 */ MCD_OPC_Decode, 203, 3, 81, // Opcode: EXTSW
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D | PPCGenAsmWriter.inc | 479 134241100U, // EXTSW 1752 0U, // EXTSW
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
D | convert-rr-to-ri-instrs.mir | 1394 %3 = EXTSW killed %2
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