/external/llvm/lib/CodeGen/ |
D | CodeGenPrepare.cpp | 1880 ZExtInst *ExtVal = dyn_cast<ZExtInst>(CI->getArgOperand(0)); in optimizeCallInst() local 1881 if (!ExtVal || !ExtVal->hasOneUse() || in optimizeCallInst() 1882 ExtVal->getParent() == CI->getParent()) in optimizeCallInst() 1885 ExtVal->moveBefore(CI); in optimizeCallInst() 1888 InsertedInsts.insert(ExtVal); in optimizeCallInst() 2966 Value *ExtVal = SExt; in promoteOperandForTruncAndAnyExt() local 2976 ExtVal = ZExt; in promoteOperandForTruncAndAnyExt() 2989 Instruction *ExtInst = dyn_cast<Instruction>(ExtVal); in promoteOperandForTruncAndAnyExt() 2996 return ExtVal; in promoteOperandForTruncAndAnyExt()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | CodeGenPrepare.cpp | 1704 ZExtInst *ExtVal = dyn_cast<ZExtInst>(CI->getArgOperand(0)); in optimizeCallInst() local 1705 if (!ExtVal || !ExtVal->hasOneUse() || in optimizeCallInst() 1706 ExtVal->getParent() == CI->getParent()) in optimizeCallInst() 1709 ExtVal->moveBefore(CI); in optimizeCallInst() 1712 InsertedInsts.insert(ExtVal); in optimizeCallInst() 3566 Value *ExtVal = SExt; in promoteOperandForTruncAndAnyExt() local 3576 ExtVal = ZExt; in promoteOperandForTruncAndAnyExt() 3589 Instruction *ExtInst = dyn_cast<Instruction>(ExtVal); in promoteOperandForTruncAndAnyExt() 3596 return ExtVal; in promoteOperandForTruncAndAnyExt()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.h | 285 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
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D | ARMISelLowering.cpp | 11196 bool ARMTargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { in isVectorLoadExtDesirable() 11197 EVT VT = ExtVal.getValueType(); in isVectorLoadExtDesirable() 11206 if (ExtVal->use_empty() || in isVectorLoadExtDesirable() 11207 !ExtVal->use_begin()->isOnlyUserOf(ExtVal.getNode())) in isVectorLoadExtDesirable() 11210 SDNode *U = *ExtVal->use_begin(); in isVectorLoadExtDesirable()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.h | 337 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
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D | ARMISelLowering.cpp | 13017 bool ARMTargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { in isVectorLoadExtDesirable() 13018 EVT VT = ExtVal.getValueType(); in isVectorLoadExtDesirable() 13027 if (ExtVal->use_empty() || in isVectorLoadExtDesirable() 13028 !ExtVal->use_begin()->isOnlyUserOf(ExtVal.getNode())) in isVectorLoadExtDesirable() 13031 SDNode *U = *ExtVal->use_begin(); in isVectorLoadExtDesirable()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 2225 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Val, in LowerSTOREVector() local 2228 ExtVal = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i16, ExtVal); in LowerSTOREVector() 2229 Ops.push_back(ExtVal); in LowerSTOREVector()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 1986 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Val, in LowerSTOREVector() local 1989 ExtVal = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i16, ExtVal); in LowerSTOREVector() 1990 Ops.push_back(ExtVal); in LowerSTOREVector()
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 1793 virtual bool isVectorLoadExtDesirable(SDValue ExtVal) const { return false; } in isVectorLoadExtDesirable() argument
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 1818 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp, in WidenVecRes_CONVERT_RNDSAT() local 1820 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp, in WidenVecRes_CONVERT_RNDSAT()
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D | DAGCombiner.cpp | 6994 SDValue ExtVal = Extract.getOperand(1); in visitBUILD_VECTOR() local 6996 unsigned ExtIndex = cast<ConstantSDNode>(ExtVal)->getZExtValue(); in visitBUILD_VECTOR() 7005 unsigned Idx = cast<ConstantSDNode>(ExtVal)->getZExtValue(); in visitBUILD_VECTOR()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | TargetLowering.h | 2241 virtual bool isVectorLoadExtDesirable(SDValue ExtVal) const { return false; } in isVectorLoadExtDesirable() argument
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 2775 SDValue ExtVal = DAG.getNode( in WidenVecRes_CONVERT_RNDSAT() local 2778 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp, in WidenVecRes_CONVERT_RNDSAT()
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D | DAGCombiner.cpp | 12809 SDValue ExtVal = Extract.getOperand(1); in visitBUILD_VECTOR() local 12810 unsigned ExtIndex = cast<ConstantSDNode>(ExtVal)->getZExtValue(); in visitBUILD_VECTOR()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 1585 SDValue ExtVal = SDValue(CurDAG->getMachineNode(PPC::INSERT_SUBREG, dl, in ExtendToInt64() local 1588 return ExtVal; in ExtendToInt64()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 4253 SDValue ExtVal = DAG.getNode(ISD::ZERO_EXTEND, SL, IntVT, Val); in lowerINSERT_VECTOR_ELT() local 4266 SDValue LHS = DAG.getNode(ISD::AND, SL, IntVT, BFM, ExtVal); in lowerINSERT_VECTOR_ELT()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 26366 bool X86TargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { in isVectorLoadExtDesirable() 26367 EVT SrcVT = ExtVal.getOperand(0).getValueType(); in isVectorLoadExtDesirable()
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