Searched refs:FCVT (Results 1 – 17 of 17) sorted by relevance
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 569 // FCVT lengthen f16/s32
572 // FCVT,FCVTN,FCVTXN
579 def : InstRW<[CyWriteCopyToFPR], (instregex "FCVT[AMNPZ][SU][SU][WX][SD]r")>;
581 // FCVT Rd, S/D = V6+LD4: 10 cycles
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| D | AArch64SchedM1.td | 261 def : InstRW<[M1WriteFCVT3], (instregex "^FCVT[DS][DS]r")>;
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| D | AArch64SchedKryoDetails.td | 730 (instregex "FCVT(((A|N|M|P)(S|U)(S|U)|Z(S|U)_Int(S|U))(W|X)(D|S)ri?|Z(S|U)(d|s))$")>;
736 (instregex "FCVT((A|N|M|P)(S|U)|Z(S|U)_Int)(v1i32|v1i64|v2f32)$")>;
742 (instregex "FCVT((A|N|M|P)(S|U)|Z(S|U)_Int)(v4f32|v2f64)$")>;
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| D | AArch64SchedA57.td | 440 def : InstRW<[A57Write_8cyc_3V], (instregex "^FCVT(L|N|XN)v")>;
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| D | AArch64InstrInfo.td | 2576 defm FCVT : FPConversion<"fcvt">;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 571 // FCVT lengthen f16/s32
574 // FCVT,FCVTN,FCVTXN
581 def : InstRW<[CyWriteCopyToFPR], (instregex "FCVT[AMNPZ][SU][SU][WX][SD]r")>;
583 // FCVT Rd, S/D = V6+LD4: 10 cycles
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| D | AArch64SchedExynosM3.td | 539 def : InstRW<[M3WriteFCVT3], (instregex "^FCVT[DHS][DHS]r")>;
541 def : InstRW<[M3WriteFCVT3A], (instregex "^FCVT[AMNPZ][SU]U[XW][DHS]r")>;
628 def : InstRW<[M3WriteFCVT3], (instregex "^FCVT(L|N|XN)v")>;
629 def : InstRW<[M3WriteFCVT2], (instregex "^FCVT[AMNPZ][SU]v")>;
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| D | AArch64SchedFalkorDetails.td | 599 def : InstRW<[FalkorWr_1VXVY_4cyc], (instregex "^FCVT(N|M|P|Z|A)(S|U)(v1i32|v1i64|v2f32)$")>;
625 def : InstRW<[FalkorWr_2VXVY_4cyc], (instregex "^FCVT(N|M|P|Z|A)(S|U)(v2f64|v4f32)$")>;
1117 def : InstRW<[FalkorWr_1VTOG_1cyc], (instregex "^FCVT(A|M|N|P|Z)(S|U)U(W|X)(S|D)r$")>;
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| D | AArch64SchedKryoDetails.td | 730 (instregex "FCVT(((A|N|M|P)(S|U)(S|U)|Z(S|U)_Int(S|U))(W|X)(D|S)ri?|Z(S|U)(d|s))$")>;
736 (instregex "FCVT((A|N|M|P)(S|U)|Z(S|U)_Int)(v1i32|v1i64|v2f32)$")>;
742 (instregex "FCVT((A|N|M|P)(S|U)|Z(S|U)_Int)(v4f32|v2f64)$")>;
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| D | AArch64SchedExynosM1.td | 474 def : InstRW<[M1WriteFCVT3], (instregex "^FCVT[DS][DS]r")>;
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| D | AArch64SchedA57.td | 444 def : InstRW<[A57Write_8cyc_3V], (instregex "^FCVT(L|N|XN)v")>;
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| D | AArch64SchedThunderX2T99.td | 1419 def : InstRW<[THX2T99Write_7Cyc_F01], (instregex "^FCVT(L|N|XN)v")>;
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| D | AArch64InstrInfo.td | 2864 defm FCVT : FPConversion<"fcvt">;
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_64.c | 91 #define FCVT 0x1e224000 macro
1462 …FAIL_IF(push_inst(compiler, FCVT | ((op & SLJIT_F32_OP) ? (1 << 22) : (1 << 15)) | VD(dst_r) | VN(… in sljit_emit_fop1()
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1817 ### FCVT ### subsection
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmWriter.inc | 10841 // ABSv4i16, ADDVv4i16v, CLSv4i16, CLZv4i16, FABSv4f16, FCVTASv4f16, FCVT...
10846 // ABSv4i32, ADDVv4i32v, CLSv4i32, CLZv4i32, FABSv4f32, FCVTASv4f32, FCVT...
10851 // ABSv8i16, ADDVv8i16v, CLSv8i16, CLZv8i16, FABSv8f16, FCVTASv8f16, FCVT...
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| /external/capstone/arch/AArch64/ |
| D | AArch64GenAsmWriter.inc | 5951 // ABSv4i32, ADDVv4i32v, CLSv4i32, CLZv4i32, FABSv4f32, FCVTASv4f32, FCVT...
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