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Searched refs:FINCSTP (Results 1 – 25 of 26) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ScheduleZnver1.td897 // FINCSTP FDECSTP.
898 def : InstRW<[ZnWriteFPU3], (instrs FINCSTP, FDECSTP)>;
DX86ScheduleAtom.td550 def : InstRW<[AtomWrite01_1], (instrs FDECSTP, FFREE, FFREEP, FINCSTP, WAIT,
DX86SchedSandyBridge.td563 def: InstRW<[SBWriteResGroup2], (instrs FDECSTP, FINCSTP, FFREE, FFREEP, FNOP,
DX86InstrFPStack.td667 def FINCSTP : I<0xD9, MRM_F7, (outs), (ins), "fincstp", []>;
DX86SchedSkylakeClient.td601 def: InstRW<[SKLWriteResGroup6], (instrs FINCSTP, FNOP)>;
DX86SchedBroadwell.td599 def: InstRW<[BWWriteResGroup5], (instrs FINCSTP, FNOP)>;
DX86SchedHaswell.td891 def: InstRW<[HWWriteResGroup6], (instrs FINCSTP, FNOP)>;
DX86SchedSkylakeServer.td614 def: InstRW<[SKXWriteResGroup6], (instrs FINCSTP, FNOP)>;
/external/llvm/lib/Target/X86/
DX86SchedHaswell.td1169 // FINCSTP FDECSTP.
1170 def : InstRW<[WriteP01], (instregex "FINCSTP", "FDECSTP")>;
DX86InstrFPStack.td658 def FINCSTP : I<0xD9, MRM_F7, (outs), (ins), "fincstp", [], IIC_FPSTP>;
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrFPStack.td582 def FINCSTP : I<0xF7, RawFrm, (outs), (ins), "fincstp", []>, D9;
DX86GenAsmWriter.inc734 3020U, // FINCSTP
5867 "M16m\000FICOM32m\000FICOMP16m\000FICOMP32m\000FINCSTP\000FLDCW16m\000FL"
DX86GenAsmWriter1.inc734 2352U, // FINCSTP
6610 "M16m\000FICOM32m\000FICOMP16m\000FICOMP32m\000FINCSTP\000FLDCW16m\000FL"
DX86GenInstrInfo.inc737 FINCSTP = 721,
4905 …{ 721, 0, 0, 0, 0, "FINCSTP", 0|(1<<MCID::UnmodeledSideEffects), 0x1ee000401ULL, NULL, NULL, 0 }, …
DX86GenAsmMatcher.inc3465 { X86::FINCSTP, "fincstp", Convert, { }, 0},
DX86GenDisassemblerTables.inc8671 "FINCSTP"
50420 0x2d1, /* FINCSTP*/
57439 0x2d1, /* FINCSTP*/
64604 0x2d1, /* FINCSTP*/
71769 0x2d1, /* FINCSTP*/
78934 0x2d1, /* FINCSTP*/
85958 0x2d1, /* FINCSTP*/
92977 0x2d1, /* FINCSTP*/
99996 0x2d1, /* FINCSTP*/
107015 0x2d1, /* FINCSTP*/
[all …]
/external/mesa3d/src/mesa/x86/
Dassyntax.h729 #define FINCSTP CHOICE(fincstp, fincstp, fincstp) macro
1442 #define FINCSTP fincstp macro
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenSubtargetInfo.inc5496 {DBGFIELD("FINCSTP") 1, false, false, 1, 1, 1, 1, 0, 0}, // #784
6712 {DBGFIELD("FINCSTP") 1, false, false, 437, 4, 1, 1, 0, 0}, // #784
7928 {DBGFIELD("FINCSTP") 1, false, false, 1, 1, 4, 1, 0, 0}, // #784
9144 {DBGFIELD("FINCSTP") 1, false, false, 1954, 5, 1, 1, 0, 0}, // #784
10360 {DBGFIELD("FINCSTP") 1, false, false, 2950, 5, 1, 1, 0, 0}, // #784
11576 {DBGFIELD("FINCSTP") 1, false, false, 437, 4, 1, 1, 0, 0}, // #784
12792 {DBGFIELD("FINCSTP") 1, false, false, 3037, 2, 4, 1, 0, 0}, // #784
14008 {DBGFIELD("FINCSTP") 1, false, false, 1954, 5, 1, 1, 0, 0}, // #784
15224 {DBGFIELD("FINCSTP") 1, false, false, 3941, 7, 26, 1, 0, 0}, // #784
DX86GenAsmWriter.inc2780 17292U, // FINCSTP
18286 0U, // FINCSTP
33792 0U, // FINCSTP
DX86GenAsmWriter1.inc2460 14028U, // FINCSTP
17966 0U, // FINCSTP
DX86GenInstrInfo.inc1027 FINCSTP = 1012,
16316 FINCSTP = 784,
18826 …ffects), 0x3640000077ULL, nullptr, ImplicitList12, nullptr, -1 ,nullptr }, // Inst #1012 = FINCSTP
DX86GenAsmMatcher.inc7584 { 2468 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, { }, },
22142 { 2468 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, { }, },
/external/capstone/arch/X86/
DX86GenAsmWriter.inc787 14732U, // FINCSTP
7058 0U, // FINCSTP
DX86GenAsmWriter1.inc787 11804U, // FINCSTP
7058 0U, // FINCSTP
DX86GenDisassemblerTables.inc10376 /* FINCSTP */
49511 0x302, /* FINCSTP */

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