/external/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 259 X86_INTRINSIC_DATA(avx_min_pd_256, INTR_TYPE_2OP, X86ISD::FMIN, 0), 260 X86_INTRINSIC_DATA(avx_min_ps_256, INTR_TYPE_2OP, X86ISD::FMIN, 0), 796 X86_INTRINSIC_DATA(avx512_mask_min_pd_128, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 0), 797 X86_INTRINSIC_DATA(avx512_mask_min_pd_256, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 0), 798 X86_INTRINSIC_DATA(avx512_mask_min_pd_512, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 800 X86_INTRINSIC_DATA(avx512_mask_min_ps_128, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 0), 801 X86_INTRINSIC_DATA(avx512_mask_min_ps_256, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 0), 802 X86_INTRINSIC_DATA(avx512_mask_min_ps_512, INTR_TYPE_2OP_MASK, X86ISD::FMIN, 805 X86ISD::FMIN, X86ISD::FMIN_RND), 807 X86ISD::FMIN, X86ISD::FMIN_RND), [all …]
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D | X86ISelLowering.h | 244 FMAX, FMIN, enumerator
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D | X86InstrFragmentsSIMD.td | 44 def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>; 47 // Commutative and Associative FMIN and FMAX.
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D | README-SSE.txt | 332 specified. We should turn int_x86_sse_max_ss and X86ISD::FMIN etc. into other
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/external/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_qpu.h | 196 A_ALU2(FMIN)
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D | vc4_qpu_emit.c | 260 A(FMIN), in vc4_generate_code_block()
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D | vc4_qir.h | 716 QIR_ALU2(FMIN) in QIR_ALU1()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64SchedA57.td | 462 def : InstRW<[A57Write_5cyc_1V], (instregex "^(FMAX|FMIN)(NM)?(v2f32)")>; 464 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FMAX|FMIN)(NM)?(v4f32|v2f64)")>; 466 def : InstRW<[A57Write_5cyc_1V], (instregex "^(FMAX|FMIN)(NM)?P(v2f32|v2i32)")>; 468 def : InstRW<[A57Write_9cyc_3V], (instregex "^(FMAX|FMIN)(NM)?P(v4f32|v2f64|v2i64)")>; 470 def : InstRW<[A57Write_10cyc_3V], (instregex "^(FMAX|FMIN)(NM)?Vv")>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64SchedA57.td | 466 def : InstRW<[A57Write_5cyc_1V], (instregex "^(FMAX|FMIN)(NM)?(v2f32)")>; 468 def : InstRW<[A57Write_5cyc_2V], (instregex "^(FMAX|FMIN)(NM)?(v4f32|v2f64)")>; 470 def : InstRW<[A57Write_5cyc_1V], (instregex "^(FMAX|FMIN)(NM)?P(v2f32|v2i32)")>; 472 def : InstRW<[A57Write_9cyc_3V], (instregex "^(FMAX|FMIN)(NM)?P(v4f32|v2f64|v2i64)")>; 474 def : InstRW<[A57Write_10cyc_3V], (instregex "^(FMAX|FMIN)(NM)?Vv")>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 312 X86_INTRINSIC_DATA(avx_min_pd_256, INTR_TYPE_2OP, X86ISD::FMIN, 0), 313 X86_INTRINSIC_DATA(avx_min_ps_256, INTR_TYPE_2OP, X86ISD::FMIN, 0), 945 X86_INTRINSIC_DATA(avx512_min_pd_512, INTR_TYPE_2OP, X86ISD::FMIN, X86ISD::FMIN_RND), 946 X86_INTRINSIC_DATA(avx512_min_ps_512, INTR_TYPE_2OP, X86ISD::FMIN, X86ISD::FMIN_RND), 1156 X86_INTRINSIC_DATA(sse_min_ps, INTR_TYPE_2OP, X86ISD::FMIN, 0), 1181 X86_INTRINSIC_DATA(sse2_min_pd, INTR_TYPE_2OP, X86ISD::FMIN, 0),
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D | X86InstrFragmentsSIMD.td | 39 def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>; 44 // Commutative and Associative FMIN and FMAX.
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D | X86ISelLowering.h | 252 FMAX, FMIN, enumerator
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D | README-SSE.txt | 332 specified. We should turn int_x86_sse_max_ss and X86ISD::FMIN etc. into other
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.h | 177 FMIN, enumerator
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/external/vixl/src/aarch64/ |
D | constants-aarch64.h | 1406 FMIN = FPDataProcessing2SourceFixed | 0x00005000, enumerator 1407 FMIN_h = FMIN | FP16, 1408 FMIN_s = FMIN, 1409 FMIN_d = FMIN | FP64,
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D | disasm-aarch64.cc | 1727 FORMAT(FMIN, "fmin"); in VisitFPDataProcessing2Source() 2740 FORMAT(FMIN, "fmin"); in VisitNEON3SameFP16()
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/external/v8/src/arm64/ |
D | constants-arm64.h | 1207 FMIN = FPDataProcessing2SourceFixed | 0x00005000, enumerator 1208 FMIN_s = FMIN, 1209 FMIN_d = FMIN | FP64,
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.h | 196 FMAX, FMIN, enumerator
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D | X86InstrFragmentsSIMD.td | 41 def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
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D | README-SSE.txt | 362 specified. We should turn int_x86_sse_max_ss and X86ISD::FMIN etc. into other
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/external/mesa3d/src/broadcom/compiler/ |
D | v3d_compiler.h | 812 VIR_A_ALU2(FMIN) in VIR_A_ALU2()
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/external/v8/src/mips/ |
D | constants-mips.h | 924 FMIN = ((12U << 22) + 27), enumerator
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D | disasm-mips.cc | 2523 case FMIN: in DecodeTypeMsa3RF()
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/external/v8/src/mips64/ |
D | constants-mips64.h | 958 FMIN = ((12U << 22) + 27), enumerator
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D | disasm-mips64.cc | 2837 case FMIN: in DecodeTypeMsa3RF()
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