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Searched refs:FPReg (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp533 unsigned FPReg = is31 ? PPC::R31 : PPC::R1; in replaceFPWithRealFP() local
538 unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg; in replaceFPWithRealFP()
552 MO.setReg(FPReg); in replaceFPWithRealFP()
759 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitPrologue() local
893 .addReg(FPReg) in emitPrologue()
1025 .addReg(FPReg, RegState::Kill) // Save FP. in emitPrologue()
1063 .addReg(FPReg) in emitPrologue()
1088 .addReg(FPReg) in emitPrologue()
1130 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); in emitPrologue()
1167 BuildMI(MBB, MBBI, dl, OrInst, FPReg) in emitPrologue()
[all …]
DPPCFastISel.cpp1121 unsigned FPReg = PPCMoveToFPReg(SrcVT, SrcReg, IsSigned); in SelectIToFP() local
1122 if (FPReg == 0) in SelectIToFP()
1137 .addReg(FPReg); in SelectIToFP()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVFrameLowering.cpp102 unsigned FPReg = getFPReg(STI); in emitPrologue() local
134 adjustReg(MBB, MBBI, DL, FPReg, SPReg, in emitPrologue()
145 unsigned FPReg = getFPReg(STI); in emitEpilogue() local
161 adjustReg(MBB, LastFrameDestroy, DL, SPReg, FPReg, in emitEpilogue()
/external/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp520 unsigned FPReg = is31 ? PPC::R31 : PPC::R1; in replaceFPWithRealFP() local
526 unsigned BPReg = HasBP ? (unsigned) RegInfo->getBaseRegister(MF) : FPReg; in replaceFPWithRealFP()
527 unsigned BP8Reg = HasBP ? (unsigned) PPC::X30 : FPReg; in replaceFPWithRealFP()
540 MO.setReg(FPReg); in replaceFPWithRealFP()
749 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitPrologue() local
883 .addReg(FPReg) in emitPrologue()
1001 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); in emitPrologue()
1038 BuildMI(MBB, MBBI, dl, OrInst, FPReg) in emitPrologue()
1045 unsigned Reg = MRI->getDwarfRegNum(FPReg, true); in emitPrologue()
1131 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitEpilogue() local
[all …]
DPPCFastISel.cpp1046 unsigned FPReg = PPCMoveToFPReg(SrcVT, SrcReg, IsSigned); in SelectIToFP() local
1047 if (FPReg == 0) in SelectIToFP()
1062 .addReg(FPReg); in SelectIToFP()
/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64AsmBackend.cpp426 unsigned FPReg = MRI.getLLVMRegNum(FPPush.getRegister(), true); in generateCompactUnwindEncoding() local
429 FPReg = getXRegFromWReg(FPReg); in generateCompactUnwindEncoding()
431 assert(LRReg == AArch64::LR && FPReg == AArch64::FP && in generateCompactUnwindEncoding()
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMELFStreamer.cpp612 unsigned FPReg; // Frame pointer register member in __anon2a1facbf0111::ARMELFStreamer
1128 FPReg = ARM::SP; in EHReset()
1225 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes()
1293 assert((NewSPReg == ARM::SP || NewSPReg == FPReg) && in emitSetFP()
1297 FPReg = NewFPReg; in emitSetFP()
1308 assert(FPReg == ARM::SP && "current FP must be SP"); in emitMovSP()
1312 FPReg = Reg; in emitMovSP()
1316 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in emitMovSP()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64AsmBackend.cpp483 unsigned FPReg = MRI.getLLVMRegNum(FPPush.getRegister(), true); in generateCompactUnwindEncoding() local
486 FPReg = getXRegFromWReg(FPReg); in generateCompactUnwindEncoding()
488 assert(LRReg == AArch64::LR && FPReg == AArch64::FP && in generateCompactUnwindEncoding()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMELFStreamer.cpp698 unsigned FPReg; // Frame pointer register member in __anonf511ea170111::ARMELFStreamer
1240 FPReg = ARM::SP; in EHReset()
1337 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes()
1405 assert((NewSPReg == ARM::SP || NewSPReg == FPReg) && in emitSetFP()
1409 FPReg = NewFPReg; in emitSetFP()
1420 assert(FPReg == ARM::SP && "current FP must be SP"); in emitMovSP()
1424 FPReg = Reg; in emitMovSP()
1428 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in emitMovSP()
/external/llvm/lib/Target/X86/
DX86FloatingPoint.cpp1549 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1555 FPKills |= 1U << FPReg; in handleSpecialFP()
1576 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1580 Op.setReg(getSTReg(FPReg)); in handleSpecialFP()
1583 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
1600 unsigned FPReg = countTrailingZeros(FPKills); in handleSpecialFP() local
1601 if (isLive(FPReg)) in handleSpecialFP()
1602 freeStackSlotAfter(Inst, FPReg); in handleSpecialFP()
1603 FPKills &= ~(1U << FPReg); in handleSpecialFP()
DX86FrameLowering.cpp1842 unsigned FPReg = TRI->getFrameRegister(MF); in assignCalleeSavedSpillSlots() local
1844 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) { in assignCalleeSavedSpillSlots()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86FloatingPoint.cpp1598 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1604 FPKills |= 1U << FPReg; in handleSpecialFP()
1628 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1632 Op.setReg(getSTReg(FPReg)); in handleSpecialFP()
1635 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
1652 unsigned FPReg = countTrailingZeros(FPKills); in handleSpecialFP() local
1653 if (isLive(FPReg)) in handleSpecialFP()
1654 freeStackSlotAfter(Inst, FPReg); in handleSpecialFP()
1655 FPKills &= ~(1U << FPReg); in handleSpecialFP()
DX86FrameLowering.cpp1962 unsigned FPReg = TRI->getFrameRegister(MF); in assignCalleeSavedSpillSlots() local
1964 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) { in assignCalleeSavedSpillSlots()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86FloatingPoint.cpp1538 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1539 FPUsed |= 1U << FPReg; in handleSpecialFP()
1545 FPKills |= 1U << FPReg; in handleSpecialFP()
1599 unsigned FPReg = getFPReg(Op); in handleSpecialFP() local
1600 Op.setReg(getSTReg(FPReg)); in handleSpecialFP()
1638 unsigned FPReg = CountTrailingZeros_32(FPKills); in handleSpecialFP() local
1639 if (isLive(FPReg)) in handleSpecialFP()
1640 freeStackSlotAfter(InsertPt, FPReg); in handleSpecialFP()
1641 FPKills &= ~(1U << FPReg); in handleSpecialFP()
DX86FrameLowering.cpp1161 unsigned FPReg = TRI->getFrameRegister(MF); in spillCalleeSavedRegisters() local
1176 if (Reg == FPReg) in spillCalleeSavedRegisters()
1228 unsigned FPReg = TRI->getFrameRegister(MF); in restoreCalleeSavedRegisters() local
1235 if (Reg == FPReg) in restoreCalleeSavedRegisters()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCFrameLowering.cpp663 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitEpilogue() local
681 .addReg(FPReg) in emitEpilogue()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp101 int FPReg; member in __anonb9f840430111::UnwindContext
104 UnwindContext(MCAsmParser &P) : Parser(P), FPReg(ARM::SP) {} in UnwindContext()
120 void saveFPReg(int Reg) { FPReg = Reg; } in saveFPReg()
121 int getFPReg() const { return FPReg; } in getFPReg()
163 FPReg = ARM::SP; in reset()
9896 int FPReg = tryParseRegister(); in parseDirectiveSetFP() local
9898 if (check(FPReg == -1, FPRegLoc, "frame pointer register expected") || in parseDirectiveSetFP()
9911 UC.saveFPReg(FPReg); in parseDirectiveSetFP()
9935 getTargetStreamer().emitSetFP(static_cast<unsigned>(FPReg), in parseDirectiveSetFP()
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp69 int FPReg; member in __anon708fb9eb0111::UnwindContext
72 UnwindContext(MCAsmParser &P) : Parser(P), FPReg(ARM::SP) {} in UnwindContext()
87 void saveFPReg(int Reg) { FPReg = Reg; } in saveFPReg()
88 int getFPReg() const { return FPReg; } in getFPReg()
127 FPReg = ARM::SP; in reset()
9613 int FPReg = tryParseRegister(); in parseDirectiveSetFP() local
9614 if (FPReg == -1) { in parseDirectiveSetFP()
9640 UC.saveFPReg(FPReg); in parseDirectiveSetFP()
9670 getTargetStreamer().emitSetFP(static_cast<unsigned>(FPReg), in parseDirectiveSetFP()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp2712 SDValue FPReg = DAG.getRegister(Info->getFrameOffsetReg(), MVT::i32); in LowerCall() local
2713 Chain = DAG.getCopyToReg(Chain, DL, FPReg, CallerSavedFP, InFlag); in LowerCall()