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Searched refs:FREM (Results 1 – 25 of 85) sorted by relevance

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/external/apache-commons-bcel/src/main/java/org/apache/bcel/generic/
DFREM.java26 public class FREM extends ArithmeticInstruction { class
30 public FREM() { in FREM() method in FREM
31 super(org.apache.bcel.Const.FREM); in FREM()
DInstructionConstants.java107 ArithmeticInstruction FREM = new FREM(); field
242 INSTRUCTIONS[Const.FREM] = FREM; in Clinit()
DInstructionConst.java106 public static final ArithmeticInstruction FREM = new FREM(); field in InstructionConst
237 INSTRUCTIONS[Const.FREM] = FREM;
DArithmeticInstruction.java63 case Const.FREM: in getType()
DVisitor.java255 void visitFREM( FREM obj ); in visitFREM()
DEmptyVisitor.java403 public void visitFREM( final FREM obj ) { in visitFREM()
DInstructionFactory.java392 return InstructionConst.FREM; in createBinaryFloatOp()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dfpcast.ll71 ; CHECK-NEXT: [[FREM:%.*]] = frem <1 x double> [[V:%.*]], [[V]]
72 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc <1 x double> [[FREM]] to <1 x float>
82 ; CHECK-NEXT: [[FREM:%.*]] = frem double [[V:%.*]], 1.000000e+00
83 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc double [[FREM]] to float
94 ; CHECK-NEXT: [[FREM:%.*]] = frem double [[FEXT]], 1.000000e-01
95 ; CHECK-NEXT: [[TRUNC:%.*]] = fptrunc double [[FREM]] to float
/external/llvm/test/CodeGen/X86/
Dfrem-msvc32.ll1 ; Make sure that 32-bit FREM is promoted to 64-bit FREM on 32-bit MSVC.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dfrem-msvc32.ll1 ; Make sure that 32-bit FREM is promoted to 64-bit FREM on 32-bit MSVC.
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h235 FADD, FSUB, FMUL, FMA, FDIV, FREM, enumerator
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h241 FADD, FSUB, FMUL, FDIV, FREM, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h260 FADD, FSUB, FMUL, FDIV, FREM, enumerator
/external/llvm/lib/Target/AMDGPU/
DAMDGPUTargetTransformInfo.cpp175 case ISD::FREM: in getArithmeticInstrCost()
/external/apache-commons-bcel/src/main/java/org/apache/bcel/
DConstants.java736 short FREM = 114; field
DConst.java1050 public static final short FREM = 114; field in Const
/external/jacoco/org.jacoco.core.test/src/org/jacoco/core/internal/flow/
DLabelFlowAnalyzerTest.java206 testInsn(FREM, true); in testInsn()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp150 case ISD::FREM: in LegalizeOp()
DSelectionDAGBuilder.h486 void visitFRem(const User &I) { visitBinary(I, ISD::FREM); } in visitFRem()
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZISelLowering.cpp144 setOperationAction(ISD::FREM, MVT::f32, Expand); in SystemZTargetLowering()
145 setOperationAction(ISD::FREM, MVT::f64, Expand); in SystemZTargetLowering()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUTargetTransformInfo.cpp398 case ISD::FREM: in getArithmeticInstrCost()
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
DAlphaISelLowering.cpp80 setOperationAction(ISD::FREM, MVT::f32, Expand); in AlphaTargetLowering()
81 setOperationAction(ISD::FREM, MVT::f64, Expand); in AlphaTargetLowering()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp202 case ISD::FREM: return "frem"; in getOperationName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp240 case ISD::FREM: return "frem"; in getOperationName()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp82 ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()

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