| /external/python/cpython2/Lib/plat-irix5/ |
| D | FILE.py | 155 FTRUNC = 0x0200 variable
219 FTRUNC = 0x0200 variable
|
| /external/python/cpython2/Lib/plat-irix6/ |
| D | FILE.py | 562 FTRUNC = 0x0200 variable
657 FTRUNC = 0x0200 variable
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 452 FCEIL, FTRUNC, FRINT, FNEARBYINT, FFLOOR, enumerator
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 526 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
|
| D | BasicTTIImpl.h | 788 ISDs.push_back(ISD::FTRUNC); in getIntrinsicInstrCost()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 559 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
|
| D | BasicTTIImpl.h | 1059 ISDs.push_back(ISD::FTRUNC);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCCTRLoops.cpp | 330 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; in mightUseCTR()
396 Opcode = ISD::FTRUNC; break; in mightUseCTR()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCTRLoops.cpp | 304 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; in mightUseCTR()
368 Opcode = ISD::FTRUNC; break; in mightUseCTR()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 245 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in AMDGPUTargetLowering()
278 setOperationAction(ISD::FTRUNC, MVT::f64, Custom); in AMDGPUTargetLowering()
419 setOperationAction(ISD::FTRUNC, VT, Expand); in AMDGPUTargetLowering()
714 case ISD::FTRUNC: return LowerFTRUNC(Op, DAG); in LowerOperation()
1287 fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq); in LowerDIVREM24()
1597 SDValue Floor = DAG.getNode(ISD::FTRUNC, SL, VT, Div); in LowerFREM()
1611 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFCEIL()
1731 SDValue T = DAG.getNode(ISD::FTRUNC, SL, MVT::f32, X); in LowerFROUND32()
1832 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFFLOOR()
2047 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFP64_TO_INT()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 312 setOperationAction(ISD::FTRUNC, MVT::f32, Legal); in AMDGPUTargetLowering()
459 setOperationAction(ISD::FTRUNC, VT, Expand); in AMDGPUTargetLowering()
554 case ISD::FTRUNC: in fnegFoldsIntoOp()
1134 case ISD::FTRUNC: return LowerFTRUNC(Op, DAG); in LowerOperation()
1502 fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq); in LowerDIVREM24()
1604 SDValue Trunc = DAG.getNode(ISD::FTRUNC, DL, MVT::f32, Mul2); in LowerUDIVREM64()
1947 SDValue Floor = DAG.getNode(ISD::FTRUNC, SL, VT, Div); in LowerFREM()
1961 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFCEIL()
2086 SDValue T = DAG.getNode(ISD::FTRUNC, SL, VT, X); in LowerFROUND32_16()
2187 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFFLOOR()
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 185 case ISD::FTRUNC: in LegalizeOp()
|
| D | LegalizeVectorTypes.cpp | 88 case ISD::FTRUNC: in ScalarizeVectorResult()
465 case ISD::FTRUNC: in SplitVectorResult()
989 case ISD::FTRUNC: in SplitVectorOperand()
1312 case ISD::FTRUNC: in WidenVectorResult()
|
| D | LegalizeFloatTypes.cpp | 92 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break; in SoftenFloatResult()
872 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break; in ExpandFloatResult()
|
| /external/mesa3d/src/broadcom/compiler/ |
| D | v3d_compiler.h | 856 VIR_A_ALU1(FTRUNC) in VIR_A_ALU2()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 162 case ISD::FTRUNC: return "ftrunc"; in getOperationName()
|
| D | LegalizeFloatTypes.cpp | 105 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break; in SoftenFloatResult()
1042 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break; in ExpandFloatResult()
1884 case ISD::FTRUNC: R = PromoteFloatRes_UnaryOp(N); break; in PromoteFloatResult()
|
| D | LegalizeVectorOps.cpp | 319 case ISD::FTRUNC: in LegalizeOp()
|
| D | LegalizeVectorTypes.cpp | 95 case ISD::FTRUNC: in ScalarizeVectorResult()
654 case ISD::FTRUNC: in SplitVectorResult()
1505 case ISD::FTRUNC: in SplitVectorOperand()
2168 case ISD::FTRUNC: in WidenVectorResult()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 188 case ISD::FTRUNC: return "ftrunc"; in getOperationName()
|
| D | LegalizeFloatTypes.cpp | 105 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break; in SoftenFloatResult()
1096 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break; in ExpandFloatResult()
1902 case ISD::FTRUNC: in PromoteFloatResult()
|
| D | LegalizeVectorTypes.cpp | 98 case ISD::FTRUNC: in ScalarizeVectorResult()
710 case ISD::FTRUNC: in SplitVectorResult()
1644 case ISD::FTRUNC: in SplitVectorOperand()
2376 case ISD::FTRUNC: in WidenVectorResult()
|
| D | LegalizeVectorOps.cpp | 378 case ISD::FTRUNC: in LegalizeOp()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 87 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 94 {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FRINT}) in WebAssemblyTargetLowering()
|