Searched refs:GPRArgRegs (Results 1 – 9 of 9) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMCallingConv.h | 77 static const MCPhysReg GPRArgRegs[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAAPCS() local 83 Reg = State.AllocateReg(GPRArgRegs); in f64AssignAAPCS()
|
D | ARMFastISel.cpp | 3056 static const MCPhysReg GPRArgRegs[] = { in fastLowerArguments() local 3063 unsigned SrcReg = GPRArgRegs[ArgNo]; in fastLowerArguments()
|
D | ARMISelLowering.cpp | 145 static const MCPhysReg GPRArgRegs[] = { variable 2194 unsigned Reg = State->AllocateReg(GPRArgRegs); in HandleByVal() 2201 Reg = State->AllocateReg(GPRArgRegs); in HandleByVal() 2214 while (State->AllocateReg(GPRArgRegs)) in HandleByVal() 2231 State->AllocateReg(GPRArgRegs); in HandleByVal() 3574 unsigned RBeginIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in StoreByValRegs() 3575 RBegin = RBeginIdx == 4 ? (unsigned)ARM::R4 : GPRArgRegs[RBeginIdx]; in StoreByValRegs() 3676 unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in LowerFormalArguments() 3677 if (RegIdx != array_lengthof(GPRArgRegs)) in LowerFormalArguments() 3678 ArgRegBegin = std::min(ArgRegBegin, (unsigned)GPRArgRegs[RegIdx]); in LowerFormalArguments()
|
/external/llvm/lib/Target/ARM/ |
D | ARMCallingConv.h | 77 static const MCPhysReg GPRArgRegs[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAAPCS() local 83 Reg = State.AllocateReg(GPRArgRegs); in f64AssignAAPCS()
|
D | ARMISelLowering.cpp | 84 static const MCPhysReg GPRArgRegs[] = { variable 1993 unsigned Reg = State->AllocateReg(GPRArgRegs); in HandleByVal() 2000 Reg = State->AllocateReg(GPRArgRegs); in HandleByVal() 2013 while (State->AllocateReg(GPRArgRegs)) in HandleByVal() 2030 State->AllocateReg(GPRArgRegs); in HandleByVal() 3142 unsigned RBeginIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in StoreByValRegs() 3143 RBegin = RBeginIdx == 4 ? (unsigned)ARM::R4 : GPRArgRegs[RBeginIdx]; in StoreByValRegs() 3247 unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in LowerFormalArguments() 3248 if (RegIdx != array_lengthof(GPRArgRegs)) in LowerFormalArguments() 3249 ArgRegBegin = std::min(ArgRegBegin, (unsigned)GPRArgRegs[RegIdx]); in LowerFormalArguments()
|
D | ARMFastISel.cpp | 3035 static const MCPhysReg GPRArgRegs[] = { in fastLowerArguments() local 3043 unsigned SrcReg = GPRArgRegs[Idx]; in fastLowerArguments()
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 92 static const unsigned GPRArgRegs[] = { variable 1562 unsigned reg = State->AllocateReg(GPRArgRegs, 4); in HandleByVal() 1581 while (State->AllocateReg(GPRArgRegs, 4)) in HandleByVal() 2406 firstUnalloced = CCInfo.getFirstUnallocated(GPRArgRegs, in computeRegArea() 2407 sizeof(GPRArgRegs) / in computeRegArea() 2408 sizeof(GPRArgRegs[0])); in computeRegArea() 2436 (GPRArgRegs, sizeof(GPRArgRegs) / sizeof(GPRArgRegs[0])); in VarArgStyleRegisters() 2461 unsigned VReg = MF.addLiveIn(GPRArgRegs[firstRegToSaveIndex], RC); in VarArgStyleRegisters()
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 2647 static const MCPhysReg GPRArgRegs[] = { AArch64::X0, AArch64::X1, AArch64::X2, in saveVarArgRegisters() local 2650 static const unsigned NumGPRArgRegs = array_lengthof(GPRArgRegs); in saveVarArgRegisters() 2651 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters() 2661 unsigned VReg = MF.addLiveIn(GPRArgRegs[i], &AArch64::GPR64RegClass); in saveVarArgRegisters()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 3153 static const MCPhysReg GPRArgRegs[] = { AArch64::X0, AArch64::X1, AArch64::X2, in saveVarArgRegisters() local 3156 static const unsigned NumGPRArgRegs = array_lengthof(GPRArgRegs); in saveVarArgRegisters() 3157 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters() 3173 unsigned VReg = MF.addLiveIn(GPRArgRegs[i], &AArch64::GPR64RegClass); in saveVarArgRegisters()
|