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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dmul-constant-result.ll6 …x86_64-unknown -mcpu=haswell -machine-combiner-inc-threshold=0| FileCheck %s --check-prefix=X64-HSW
248 ; X64-HSW-LABEL: mult:
249 ; X64-HSW: # %bb.0:
250 ; X64-HSW-NEXT: # kill: def $edi killed $edi def $rdi
251 ; X64-HSW-NEXT: cmpl $1, %esi
252 ; X64-HSW-NEXT: movl $1, %ecx
253 ; X64-HSW-NEXT: movl %esi, %eax
254 ; X64-HSW-NEXT: cmovgl %ecx, %eax
255 ; X64-HSW-NEXT: testl %esi, %esi
256 ; X64-HSW-NEXT: cmovel %ecx, %eax
[all …]
Dmul-constant-i32.ll3 … %s -mtriple=x86_64-unknown -print-schedule=true -mcpu=haswell| FileCheck %s --check-prefix=X64-HSW
6 …nstant-optimization=false -print-schedule=true -mcpu=haswell| FileCheck %s --check-prefix=HSW-NOOPT
17 ; X64-HSW-LABEL: test_mul_by_1:
18 ; X64-HSW: # %bb.0:
19 ; X64-HSW-NEXT: movl %edi, %eax # sched: [1:0.25]
20 ; X64-HSW-NEXT: retq # sched: [7:1.00]
32 ; HSW-NOOPT-LABEL: test_mul_by_1:
33 ; HSW-NOOPT: # %bb.0:
34 ; HSW-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.25]
35 ; HSW-NOOPT-NEXT: retq # sched: [7:1.00]
[all …]
Dmul-constant-i64.ll3 … %s -mtriple=x86_64-unknown -print-schedule=true -mcpu=haswell| FileCheck %s --check-prefix=X64-HSW
6 …nstant-optimization=false -print-schedule=true -mcpu=haswell| FileCheck %s --check-prefix=HSW-NOOPT
18 ; X64-HSW-LABEL: test_mul_by_1:
19 ; X64-HSW: # %bb.0:
20 ; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
21 ; X64-HSW-NEXT: retq # sched: [7:1.00]
34 ; HSW-NOOPT-LABEL: test_mul_by_1:
35 ; HSW-NOOPT: # %bb.0:
36 ; HSW-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.25]
37 ; HSW-NOOPT-NEXT: retq # sched: [7:1.00]
[all …]
Dpr35636.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s --check-prefix=HSW
6 ; HSW-LABEL: _Z15uint64_to_asciimPc:
7 ; HSW: # %bb.0: # %bb
8 ; HSW-NEXT: movabsq $811296384146066817, %rax # imm = 0xB424DC35095CD81
9 ; HSW-NEXT: movq %rdi, %rdx
10 ; HSW-NEXT: mulxq %rax, %rax, %rcx
11 ; HSW-NEXT: shrq $42, %rcx
12 ; HSW-NEXT: imulq $281474977, %rcx, %rax # imm = 0x10C6F7A1
13 ; HSW-NEXT: shrq $20, %rax
14 ; HSW-NEXT: leal (%rax,%rax,4), %eax
[all …]
Dbitcnt-false-dep.ll1 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s --check-prefix=HSW
33 ;HSW-LABEL:@loopdep_popcnt32
34 ;HSW: xorl [[GPR0:%e[a-d]x]], [[GPR0]]
35 ;HSW-NEXT: popcntl {{.*}}, [[GPR0]]
59 ;HSW-LABEL:@loopdep_popcnt64
60 ;HSW: xorl %e[[GPR0:[a-d]x]], %e[[GPR0]]
61 ;HSW-NEXT: popcntq {{.*}}, %r[[GPR0]]
85 ;HSW-LABEL:@loopdep_tzct32
86 ;HSW: xorl [[GPR0:%e[a-d]x]], [[GPR0]]
87 ;HSW-NEXT: tzcntl {{.*}}, [[GPR0]]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopStrengthReduce/X86/
Dmacro-fuse-cmp.ll3 ; RUN: opt < %s -loop-reduce -mcpu=haswell -S | FileCheck %s --check-prefix=HSW
44 ; HSW-LABEL: @maxArray(
45 ; HSW-NEXT: entry:
46 ; HSW-NEXT: br label [[VECTOR_BODY:%.*]]
47 ; HSW: vector.body:
48 ; HSW-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
49 ; HSW-NEXT: [[SCEVGEP4:%.*]] = getelementptr double, double* [[X:%.*]], i64 [[INDEX]]
50 ; HSW-NEXT: [[SCEVGEP45:%.*]] = bitcast double* [[SCEVGEP4]] to <2 x double>*
51 ; HSW-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[Y:%.*]], i64 [[INDEX]]
52 ; HSW-NEXT: [[SCEVGEP1:%.*]] = bitcast double* [[SCEVGEP]] to <2 x double>*
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoadStoreVectorizer/X86/
Dload-width.ll1 …n-linux-gnu -load-store-vectorizer -mcpu haswell -S -o - %s | FileCheck --check-prefix=CHECK-HSW %s
9 ; CHECK-HSW: load <4 x double>
10 ; CHECK-HSW: load <4 x double>
11 ; CHECK-HSW-NOT: load
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/
Dscheduler-queue-usage.s6 …s=1 -all-stats=false -all-views=false -scheduler-stats < %s | FileCheck --check-prefixes=ALL,HSW %s
24 # HSW-NEXT: HWPortAny, 1/60
Dregister-file-statistics.s6 …-all-stats=false -all-views=false -register-file-stats < %s | FileCheck --check-prefixes=ALL,HSW %s
/external/mesa3d/src/intel/vulkan/
DTODO5 - Investigate CTS failures on HSW
/external/skia/src/core/
DSkCpu.h28 HSW = AVX2 | BMI1 | BMI2 | F16C | FMA, enumerator
DSkOpts.cpp119 if (SkCpu::Supports(SkCpu::HSW)) { Init_hsw(); } in init()
/external/skqp/src/core/
DSkCpu.h28 HSW = AVX2 | BMI1 | BMI2 | F16C | FMA, enumerator
DSkOpts.cpp119 if (SkCpu::Supports(SkCpu::HSW)) { Init_hsw(); } in init()
/external/grpc-grpc/examples/protos/
Dhellostreamingworld.proto18 option objc_class_prefix = "HSW";
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86.td354 // generate Gathers on all AVX2 processors. But the overhead on HSW is high.
355 // Skylake Client processor has faster Gathers than HSW and performance is
DX86SchedHaswell.td14 // but we still have to define them because KNL uses the HSW model.
/external/skia/
Dpublic.bzl86 SKIA_OPTS_HSW = "HSW"
/external/skqp/
Dpublic.bzl86 SKIA_OPTS_HSW = "HSW"
/external/skia/src/sksl/
DSkSLJIT.cpp90 if (SkCpu::Supports(SkCpu::HSW)) { in JIT()
/external/skqp/src/sksl/
DSkSLJIT.cpp90 if (SkCpu::Supports(SkCpu::HSW)) { in JIT()
/external/epid-sdk/ext/ipp/sources/include/
Dia_32e.inc1979 ; AVX2 (HSW)
3907 ; AVX2 (HSW)
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart2.csv2257 ,"GB","HSW","Halesworth","Halesworth","SFK","--3-----","AF","9511",,,
16048 ,"JP","HSW","Hirasawa","Hirasawa","05","1-------","AF","9907",,,
21118 ,"NL","HSW","Heeswijk","Heeswijk","NB","1-3-----","RN","0501",,"5139N 00528E",
D2013-1_UNLOCODE_CodeListPart3.csv23939 ,"US","HSW","Schleswig","Schleswig","IA","--3--6--","RL","0607",,"4210N 09526W",
/external/syzkaller/pkg/ifuzz/gen/
Dall-enc-instructions.txt12602 COMMENT : replaced in the HSW builds
12616 COMMENT : replaced in the HSW builds

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