| /external/u-boot/board/toradex/apalis_imx6/ |
| D | Kconfig | 43 bool "Apalis iMX6 V1.0 HW"
45 Apalis iMX6 V1.0 HW has a different pinout for the UART.
49 option the config block stating V1.0 HW selects DCE mode,
|
| /external/u-boot/doc/device-tree-bindings/reset/ |
| D | reset.txt | 21 in hardware for a reset signal to affect multiple logically separate HW blocks
23 the DT node of each affected HW block, since if activated, an unrelated block
26 children of the bus are affected by the reset signal, or an individual HW
28 appropriate software access to the reset signals in order to manage the HW,
29 rather than to slavishly enumerate the reset signal that affects each HW
|
| /external/u-boot/doc/device-tree-bindings/gpio/ |
| D | nvidia,tegra186-gpio.txt | 11 package balls is under the control of a separate pin controller HW block. Two
30 Tegra HW documentation describes a unified naming convention for all GPIOs
44 matches the HW documentation. The values chosen for the names are alphabetically
46 IDs and HW register offsets using a lookup table.
51 of the number of ports it implements. Note that the HW documentation refers to
52 both the overall controller HW module and the sets-of-ports as "controllers".
89 The interrupt outputs from the HW block, one per set of ports, in the
90 order the HW manual describes them. The number of entries required varies
|
| /external/u-boot/arch/arm/cpu/armv7/bcm281xx/ |
| D | clk-core.h | 97 #define gate_is_hw_controllable(gate) FLAG_TEST(gate, GATE, HW)
180 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
192 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
203 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
222 .flags = FLAG(GATE, HW)|FLAG(GATE, EXISTS), \
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| /external/u-boot/arch/arm/cpu/armv7/bcm235xx/ |
| D | clk-core.h | 97 #define gate_is_hw_controllable(gate) FLAG_TEST(gate, GATE, HW)
180 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
192 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
203 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
222 .flags = FLAG(GATE, HW)|FLAG(GATE, EXISTS), \
|
| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | 65803682552b31361b00dc66ca5ae970.0000069f.honggfuzz.cov | 5 …HW��}F _�E��27 May 3105 1������������������������������������ԁ�����������������������������������…
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| D | a43fbeb99f7ebb78302d5116d71ce157.000003e7.honggfuzz.cov | 5 …������������������������������������������Ng�������:��6#��D�4��*��OXL�H �ۀHW��}F _�E���x�W˫f$�…
|
| /external/honggfuzz/examples/apache-httpd/corpus_http1/ |
| D | 65803682552b31361b00dc66ca5ae970.0000069f.honggfuzz.cov | 5 …HW��}F _�E��27 May 3105 1������������������������������������ԁ�����������������������������������…
|
| D | e477cf5204a700271ab0ddd77a5ae971.0000069f.honggfuzz.cov | 5 …HW��}F _�E��27 May 3105 1������������������������������������ԁ�����������������������������������…
|
| D | a43fbeb99f7ebb78302d5116d71ce157.000003e7.honggfuzz.cov | 5 …������������������������������������������Ng�������:��6#��D�4��*��OXL�H �ۀHW��}F _�E���x�W˫f$�…
|
| /external/u-boot/doc/device-tree-bindings/net/ |
| D | snps,dwc-qos-ethernet.txt | 6 entries in properties are marked as optional, or only required in specific HW
25 The EQOS transmit path clock. The HW signal name is clk_tx_i.
30 The EQOS receive path clock. The HW signal name is clk_rx_i.
41 APB, AHB, AXI, etc. The HW signal name is hclk_i (AHB) or clk_csr_i (other
45 separate clock for the master and slave bus interfaces. The HW signal name
48 The PTP reference clock. The HW signal name is clk_ptp_ref_i.
91 - "eqos". The reset to the entire module. The HW signal name is hreset_n
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/PDB/Native/ |
| D | TpiStreamBuilder.cpp | 163 BinaryStreamWriter HW(*HVS); in commit() local
165 if (auto EC = HW.writeStreamRef(*HashValueStream)) in commit()
170 if (auto EC = HW.writeObject(IndexOffset)) in commit()
|
| /external/autotest/client/site_tests/video_ChromeRTCHWDecodeUsed/ |
| D | control.mjpeg | 7 PURPOSE = "Verify MJPEG camera video are HW accelerated."
20 Verify MJPEG camera video streams are HW accelerated.
|
| D | control.y4m | 7 PURPOSE = "Verify that HW decoding works for WebRTC/vp8 video."
20 This test verifies that HW decoding works for WebRTC/vp8 video.
|
| /external/autotest/client/site_tests/video_ChromeRTCHWEncodeUsed/ |
| D | control | 7 PURPOSE = "Verify that HW Encoding works for WebRTC/vp8 video."
21 This test verifies that HW encoding works for WebRTC/vp8 video.
|
| /external/autotest/client/site_tests/video_MediaRecorderPerf/ |
| D | control.h264 | 8 Measure frame processing time and CPU usage with SW and HW H.264 encode
26 This test uses MediaRecorder to record videos with HW encode on and off,
|
| /external/autotest/server/site_tests/firmware_Fingerprint/ |
| D | control.rw_no_update_ro | 10 Verify HW write protect prevents RO fingerprint firmware modification.
13 Fails if the RO firmware can be written while HW write protect is enabled.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
| D | HwModeSelect.td | 4 // classes that are then used to select a value based on the HW mode.
5 // It contains a list of HW modes, and a derived class should provide a
|
| /external/syzkaller/pkg/report/testdata/akaros/report/ |
| D | 3 | 5 HW TRAP frame (partial) at 0xffffffffc82cbd20 on core 1
52 HW TRAP frame (partial) at 0xffffffffc82cc720 on core 5
99 HW TRAP frame (partial) at 0xffffffffc82cbaa0 on core 0
|
| /external/u-boot/doc/ |
| D | README.omap3 | 75 To make U-Boot for OMAP3 support NAND device SW or HW ECC calculation, U-Boot
84 enables SW ECC calculation. HW ECC enabled with
89 executed by OMAP3's boot rom and therefore has to be written with HW ECC.
|
| /external/pdfium/ |
| D | pdfiumfpdfapi.bp | 55 "core/fpdfapi/cmaps/Japan1/UniJIS-UCS2-HW-H_4.cpp",
56 "core/fpdfapi/cmaps/Japan1/UniJIS-UCS2-HW-V_4.cpp",
64 "core/fpdfapi/cmaps/Korea1/KSCms-UHC-HW-H_1.cpp",
65 "core/fpdfapi/cmaps/Korea1/KSCms-UHC-HW-V_1.cpp",
|
| /external/vulkan-validation-layers/ |
| D | GOVERNANCE.md | 18 …- Continuous Integration: HW test farms operated by Google and LunarG monitor various hardware/sof…
21 …- Continuous Integration: Along with Github, HW test farms operated by Google and LunarG perform p…
|
| /external/chromium-trace/catapult/systrace/systrace/test_data/ |
| D | decompressed_atrace_data.txt | 230 …<...>-18964 (-----) [005] ...1 683202.182379: tracing_mark_write: B|18926|Allocate 896x128 HW Layer
234 …<...>-18964 (-----) [005] ...1 683202.182809: tracing_mark_write: B|18926|Optimize HW Layer Displa…
272 …<...>-18964 (-----) [005] ...1 683202.187274: tracing_mark_write: B|18926|Issue HW Layer DisplayLi…
307 …...>-18964 (-----) [005] ...1 683202.208469: tracing_mark_write: B|18926|Allocate 1088x192 HW Layer
309 …...>-18964 (-----) [005] ...1 683202.208545: tracing_mark_write: B|18926|Allocate 1088x192 HW Layer
314 …<...>-18964 (-----) [005] ...1 683202.208632: tracing_mark_write: B|18926|Optimize HW Layer Displa…
320 …<...>-18964 (-----) [005] ...1 683202.208705: tracing_mark_write: B|18926|Optimize HW Layer Displa…
357 …<...>-18964 (-----) [005] ...1 683202.210303: tracing_mark_write: B|18926|Issue HW Layer DisplayLi…
359 …<...>-18964 (-----) [005] ...1 683202.211769: tracing_mark_write: B|18926|Issue HW Layer DisplayLi…
|
| /external/libxcam/ |
| D | METADATA | 5 "other HW platforms to improve image/video quality. "
|
| /external/toolchain-utils/ |
| D | COMMIT-QUEUE.ini | 13 # Files in toolchain-utils repo do not impact any HW/VM tests.
|