| /external/libhevc/common/arm/ |
| D | ihevc_sao_band_offset_chroma.s | 133 …VADD.I8 D5,D1,D31 @band_table_u.val[0] = vadd_u8(band_table_u.val[0], sao_ba…
136 …VADD.I8 D6,D2,D31 @band_table_u.val[1] = vadd_u8(band_table_u.val[1], sao_ba…
139 …VADD.I8 D7,D3,D31 @band_table_u.val[2] = vadd_u8(band_table_u.val[2], sao_ba…
142 …VADD.I8 D8,D4,D31 @band_table_u.val[3] = vadd_u8(band_table_u.val[3], sao_ba…
150 VMOV.I8 D30,#16 @vdup_n_u8(16)
151 …VADD.I8 D1,D5,D29 @band_table_u.val[0] = vadd_u8(band_table_u.val[0], vdup_n…
154 …VADD.I8 D2,D6,D28 @band_table_u.val[1] = vadd_u8(band_table_u.val[1], vdup_n…
157 …VADD.I8 D3,D7,D27 @band_table_u.val[2] = vadd_u8(band_table_u.val[2], vdup_n…
160 …VADD.I8 D4,D8,D26 @band_table_u.val[3] = vadd_u8(band_table_u.val[3], vdup_n…
213 …VADD.I8 D13,D9,D30 @band_table_v.val[0] = vadd_u8(band_table_v.val[0], band_p…
[all …]
|
| D | ihevc_sao_band_offset_luma.s | 125 … VADD.I8 D5,D1,D31 @band_table.val[0] = vadd_u8(band_table.val[0], band_pos)
128 … VADD.I8 D6,D2,D31 @band_table.val[1] = vadd_u8(band_table.val[1], band_pos)
131 … VADD.I8 D7,D3,D31 @band_table.val[2] = vadd_u8(band_table.val[2], band_pos)
134 … VADD.I8 D8,D4,D31 @band_table.val[3] = vadd_u8(band_table.val[3], band_pos)
137 …VADD.I8 D1,D5,D29 @band_table.val[0] = vadd_u8(band_table.val[0], vdup_n_u8(…
139 VMOV.I8 D29,#16 @vdup_n_u8(16)
140 …VADD.I8 D2,D6,D28 @band_table.val[1] = vadd_u8(band_table.val[1], vdup_n_u8(…
143 …VADD.I8 D3,D7,D27 @band_table.val[2] = vadd_u8(band_table.val[2], vdup_n_u8(…
145 …VADD.I8 D4,D8,D26 @band_table.val[3] = vadd_u8(band_table.val[3], vdup_n_u8(…
207 VSUB.I8 D14,D13,D31 @vsub_u8(au1_cur_row, band_pos)
[all …]
|
| D | ihevc_sao_edge_offset_class0.s | 88 VMOV.I8 Q1,#2 @const_2 = vdupq_n_s8(2)
175 … VSUB.I8 Q10,Q9,Q8 @sign_left = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt))
202 …VSUB.I8 Q11,Q9,Q8 @sign_right = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt))
205 VADD.I8 Q7,Q1,Q10 @edge_idx = vaddq_s8(const_2, sign_left)
208 VADD.I8 Q7,Q7,Q11 @edge_idx = vaddq_s8(edge_idx, sign_right)
211 …VSUB.I8 Q10,Q0,Q15 @II sign_left = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_g…
217 …VSUB.I8 Q11,Q0,Q15 @II sign_right = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_…
223 VADD.I8 Q14,Q1,Q10 @II edge_idx = vaddq_s8(const_2, sign_left)
224 VADD.I8 Q14,Q14,Q11 @II edge_idx = vaddq_s8(edge_idx, sign_right)
309 … VSUB.I8 Q10,Q9,Q8 @sign_left = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt))
[all …]
|
| D | ihevc_sao_edge_offset_class1.s | 115 VMOV.I8 Q0,#2 @const_2 = vdupq_n_s8(2)
168 VADD.I8 Q6,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
171 VADD.I8 Q6,Q6,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
180 VADD.I8 Q11,Q0,Q8 @II edge_idx = vaddq_s8(const_2, sign_up)
185 VADD.I8 Q11,Q11,Q4 @II edge_idx = vaddq_s8(edge_idx, sign_down)
241 VADD.I8 Q11,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
242 VADD.I8 Q11,Q11,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
310 VADD.I8 Q6,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
313 VADD.I8 Q6,Q6,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
320 VADD.I8 Q11,Q0,Q8 @II edge_idx = vaddq_s8(const_2, sign_up)
[all …]
|
| D | ihevc_sao_edge_offset_class1_chroma.s | 118 VMOV.I8 Q0,#2 @const_2 = vdupq_n_s8(2)
172 VADD.I8 Q6,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
175 VADD.I8 Q6,Q6,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
184 VADD.I8 Q11,Q0,Q8 @II edge_idx = vaddq_s8(const_2, sign_up)
190 VADD.I8 Q11,Q11,Q14 @II edge_idx = vaddq_s8(edge_idx, sign_down)
253 VADD.I8 Q11,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
254 VADD.I8 Q11,Q11,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
327 VADD.I8 Q6,Q0,Q8 @edge_idx = vaddq_s8(const_2, sign_up)
330 VADD.I8 Q6,Q6,Q10 @edge_idx = vaddq_s8(edge_idx, sign_down)
339 VADD.I8 Q11,Q0,Q8 @II edge_idx = vaddq_s8(const_2, sign_up)
[all …]
|
| D | ihevc_sao_edge_offset_class3.s | 202 VMOV.I8 Q0,#2 @const_2 = vdupq_n_s8(2)
281 VMOV.I8 Q9,#0
321 VADD.I8 Q9,Q0,Q7 @I edge_idx = vaddq_s8(const_2, sign_up)
322 VADD.I8 Q9,Q9,Q5 @I edge_idx = vaddq_s8(edge_idx, sign_down)
410 VADD.I8 Q13,Q0,Q7 @II edge_idx = vaddq_s8(const_2, sign_up)
415 VADD.I8 Q13,Q13,Q12 @II edge_idx = vaddq_s8(edge_idx, sign_down)
430 VADD.I8 Q9,Q0,Q7 @III edge_idx = vaddq_s8(const_2, sign_up)
432 VADD.I8 Q9,Q9,Q5 @III edge_idx = vaddq_s8(edge_idx, sign_down)
517 VADD.I8 Q13,Q0,Q7 @edge_idx = vaddq_s8(const_2, sign_up)
520 VADD.I8 Q13,Q13,Q12 @edge_idx = vaddq_s8(edge_idx, sign_down)
[all …]
|
| D | ihevc_sao_edge_offset_class2.s | 190 VMOV.I8 Q0,#2 @const_2 = vdupq_n_s8(2)
274 VMOV.I8 Q9,#0
303 VADD.I8 Q12,Q0,Q7 @I edge_idx = vaddq_s8(const_2, sign_up)
308 VADD.I8 Q12,Q12,Q5 @I edge_idx = vaddq_s8(edge_idx, sign_down)
387 VADD.I8 Q11,Q0,Q7 @II edge_idx = vaddq_s8(const_2, sign_up)
388 VADD.I8 Q11,Q11,Q12 @II edge_idx = vaddq_s8(edge_idx, sign_down)
401 VADD.I8 Q9,Q0,Q7 @III edge_idx = vaddq_s8(const_2, sign_up)
403 VADD.I8 Q9,Q9,Q5 @III edge_idx = vaddq_s8(edge_idx, sign_down)
479 VADD.I8 Q9,Q0,Q7 @edge_idx = vaddq_s8(const_2, sign_up)
480 VADD.I8 Q9,Q9,Q5 @edge_idx = vaddq_s8(edge_idx, sign_down)
[all …]
|
| D | ihevc_sao_edge_offset_class3_chroma.s | 285 VMOV.I8 Q0,#2 @const_2 = vdupq_n_s8(2)
330 VMOV.I8 Q9,#0
361 VMOV.I8 Q9,#0 @I
409 VADD.I8 Q9,Q0,Q7 @I edge_idx = vaddq_s8(const_2, sign_up)
410 VADD.I8 Q9,Q9,Q11 @I edge_idx = vaddq_s8(edge_idx, sign_down)
513 VADD.I8 Q13,Q0,Q7 @II edge_idx = vaddq_s8(const_2, sign_up)
517 VADD.I8 Q13,Q13,Q12 @II edge_idx = vaddq_s8(edge_idx, sign_down)
539 VADD.I8 Q9,Q0,Q7 @III edge_idx = vaddq_s8(const_2, sign_up)
541 VADD.I8 Q9,Q9,Q11 @III edge_idx = vaddq_s8(edge_idx, sign_down)
643 VADD.I8 Q9,Q0,Q7 @edge_idx = vaddq_s8(const_2, sign_up)
[all …]
|
| D | ihevc_sao_edge_offset_class2_chroma.s | 273 VMOV.I8 Q0,#2 @const_2 = vdupq_n_s8(2)
374 VMOV.I8 Q9,#0
417 VADD.I8 Q9,Q0,Q7 @I edge_idx = vaddq_s8(const_2, sign_up)
418 VADD.I8 Q9,Q9,Q11 @I edge_idx = vaddq_s8(edge_idx, sign_down)
510 VADD.I8 Q13,Q0,Q7 @II edge_idx = vaddq_s8(const_2, sign_up)
514 VADD.I8 Q13,Q13,Q12 @II edge_idx = vaddq_s8(edge_idx, sign_down)
547 VADD.I8 Q9,Q0,Q7 @III edge_idx = vaddq_s8(const_2, sign_up)
552 VADD.I8 Q9,Q9,Q11 @III edge_idx = vaddq_s8(edge_idx, sign_down)
641 VADD.I8 Q13,Q0,Q7 @edge_idx = vaddq_s8(const_2, sign_up)
642 VADD.I8 Q13,Q13,Q12 @edge_idx = vaddq_s8(edge_idx, sign_down)
[all …]
|
| /external/webp/src/dsp/ |
| D | mips_macro.h | 42 I0, I1, I2, I3, I4, I5, I6, I7, I8, I9) \ argument
46 "ulw %[" #O3 "], " #I4 "+" XSTR(I9) "*" #I8 "(%[" #I0 "]) \n\t"
162 I8, I9, I10, I11, I12, I13) \ argument
183 "usw %[" #IO0 "], " XSTR(I13) "*" #I9 "(%[" #I8 "]) \n\t" \
184 "usw %[" #IO2 "], " XSTR(I13) "*" #I10 "(%[" #I8 "]) \n\t" \
185 "usw %[" #IO4 "], " XSTR(I13) "*" #I11 "(%[" #I8 "]) \n\t" \
186 "usw %[" #IO6 "], " XSTR(I13) "*" #I12 "(%[" #I8 "]) \n\t"
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | hsa-metadata-from-llvm-ir-full.ll | 36 ; CHECK-NEXT: ValueType: I8
53 ; CHECK-NEXT: ValueType: I8
90 ; CHECK-NEXT: ValueType: I8
125 ; CHECK-NEXT: ValueType: I8
160 ; CHECK-NEXT: ValueType: I8
195 ; CHECK-NEXT: ValueType: I8
230 ; CHECK-NEXT: ValueType: I8
265 ; CHECK-NEXT: ValueType: I8
301 ; CHECK-NEXT: ValueType: I8
337 ; CHECK-NEXT: ValueType: I8
[all …]
|
| D | hsa-metadata-enqueue-kernel.ll | 19 ; CHECK-NEXT: ValueType: I8
51 ; CHECK-NEXT: ValueType: I8
68 ; CHECK-NEXT: ValueType: I8
73 ; CHECK-NEXT: ValueType: I8
78 ; CHECK-NEXT: ValueType: I8
|
| /external/libhevc/decoder/arm/ |
| D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 176 @VMOV.I8 Q1,#128
230 VMOV.I8 D17,#0
240 VMOV.I8 D23,#0
281 VMOV.I8 D17,#0
291 VMOV.I8 D23,#0
313 @VMOV.I8 Q1,#128
361 VMOV.I8 D17,#0
371 VMOV.I8 D23,#0
403 VMOV.I8 D17,#0
413 VMOV.I8 D23,#0
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZInstrFormats.td | 57 class I8<bits<8> op, Format f, dag outs, dag ins, string asmstr,
85 : I8<op, RRForm, outs, ins, asmstr, pattern>;
97 : I8<op, RXForm, outs, ins, asmstr, pattern> {
105 : I8<op, RSForm, outs, ins, asmstr, pattern> {
113 : I8<op, SIForm, outs, ins, asmstr, pattern> {
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
| D | hsa-metadata-unknown-key.s | 22 ValueType: I8
40 ValueType: I8
|
| D | hsa-metadata-kernel-args.s | 53 ValueType: I8
70 ValueType: I8
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | copy-physreg-128.ll | 10 %I8 = insertelement <8 x i64> undef, i64 %1, i32 3
15 %B29 = urem <8 x i64> %I8, %I21
38 %B155 = udiv <8 x i64> %I8, %I139
|
| D | DAGCombiner_illegal_BUILD_VECTOR.ll | 13 %I8 = insertelement <8 x i8> zeroinitializer, i8 -119, i32 2
14 %FC = uitofp <8 x i8> %I8 to <8 x float>
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/ |
| D | llvm-stress-s525530439.ll | 29 %I8 = insertelement <4 x i32> zeroinitializer, i32 %3, i32 3
49 …%Shuff21 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %I8, <4 x i32> <i32 undef, i32 2, i3…
107 …%Shuff55 = shufflevector <4 x i32> %Shuff21, <4 x i32> %I8, <4 x i32> <i32 4, i32 6, i32 undef, i3…
115 …%Shuff61 = shufflevector <4 x i32> %I8, <4 x i32> %I8, <4 x i32> <i32 undef, i32 1, i32 undef, i32…
127 …%Shuff68 = shufflevector <4 x i32> %Sl64, <4 x i32> %I8, <4 x i32> <i32 5, i32 undef, i32 1, i32 u…
|
| /external/llvm/test/CodeGen/Mips/msa/ |
| D | llvm-stress-s525530439.ll | 29 %I8 = insertelement <4 x i32> zeroinitializer, i32 %3, i32 3
49 …%Shuff21 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %I8, <4 x i32> <i32 undef, i32 2, i3…
107 …%Shuff55 = shufflevector <4 x i32> %Shuff21, <4 x i32> %I8, <4 x i32> <i32 4, i32 6, i32 undef, i3…
115 …%Shuff61 = shufflevector <4 x i32> %I8, <4 x i32> %I8, <4 x i32> <i32 undef, i32 1, i32 undef, i32…
127 …%Shuff68 = shufflevector <4 x i32> %Sl64, <4 x i32> %I8, <4 x i32> <i32 5, i32 undef, i32 1, i32 u…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | Mips16InstrFormats.td | 581 // Format EXT-I8 instruction class in Mips16 :
582 // <|EXTEND|imm10:5|imm15:11|I8|funct|0|imm4:0>
590 bits<5> I8;
594 let I8 = 0b00110;
598 let Inst{15-11} = I8;
607 // <|EXTEND|xsregs|framesize7:4|aregs|I8|SVRS|s|ra|s0|s1|framesize3:0>
617 bits<5> I8 = 0b01100;
630 let Inst{15-11} = I8;
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips16InstrFormats.td | 581 // Format EXT-I8 instruction class in Mips16 :
582 // <|EXTEND|imm10:5|imm15:11|I8|funct|0|imm4:0>
590 bits<5> I8;
594 let I8 = 0b00110;
598 let Inst{15-11} = I8;
607 // <|EXTEND|xsregs|framesize7:4|aregs|I8|SVRS|s|ra|s0|s1|framesize3:0>
617 bits<5> I8 = 0b01100;
630 let Inst{15-11} = I8;
|
| /external/llvm/test/CodeGen/X86/ |
| D | vshift-6.ll | 29 …%I8 = insertelement <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -…
30 …-1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, %I8
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/X86/ |
| D | arith.ll | 31 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
50 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
69 ; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
88 ; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
107 ; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, und…
126 ; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, und…
145 ; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
164 ; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
183 ; BTVER2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = add i8 undef, undef
204 %I8 = add i8 undef, undef
[all …]
|
| /external/vixl/examples/aarch32/ |
| D | mandelbrot.cc | 52 __ Vmov(I8, kStars, '*'); in GenerateMandelBrot()
53 __ Vmov(I8, kSpaces, ' '); in GenerateMandelBrot()
|