Searched refs:ILVL (Results 1 – 20 of 20) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 186 ILVL, // Interleave left elements enumerator
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| D | MipsSEISelLowering.cpp | 1923 return DAG.getNode(MipsISD::ILVL, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2723 return DAG.getNode(MipsISD::ILVL, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVL()
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| D | MipsISelLowering.cpp | 216 case MipsISD::ILVL: return "MipsISD::ILVL"; in getTargetNodeName()
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| D | MipsMSAInstrInfo.td | 52 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 232 ILVL, // Interleave left elements enumerator
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| D | MipsScheduleP5600.td | 393 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(ILVR|ILVL)_[BHWD]$")>;
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| D | MipsSEISelLowering.cpp | 1905 return DAG.getNode(MipsISD::ILVL, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2814 return DAG.getNode(MipsISD::ILVL, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVL()
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| D | MipsScheduleGeneric.td | 996 def : InstRW<[GenericWriteMSAShortLogic], (instregex "^(ILVR|ILVL)_[BHWD]$")>;
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| D | MipsISelLowering.cpp | 294 case MipsISD::ILVL: return "MipsISD::ILVL"; in getTargetNodeName()
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| D | MipsMSAInstrInfo.td | 44 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
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| /external/v8/src/mips/ |
| D | constants-mips.h | 882 ILVL = ((4U << 23) + 20), enumerator
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| D | disasm-mips.cc | 2407 case ILVL: in DecodeTypeMsa3R()
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| D | simulator-mips.cc | 5134 case ILVL: in Msa3RInstrHelper_shuffle()
5262 case ILVL: in DecodeTypeMsa3R()
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| D | assembler-mips.cc | 3488 V(ilvl, ILVL) \
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 916 ILVL = ((4U << 23) + 20), enumerator
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| D | disasm-mips64.cc | 2721 case ILVL: in DecodeTypeMsa3R()
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| D | simulator-mips64.cc | 5358 case ILVL: in Msa3RInstrHelper_shuffle()
5486 case ILVL: in DecodeTypeMsa3R()
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| D | assembler-mips64.cc | 3806 V(ilvl, ILVL) \
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenFastISel.inc | 3000 // FastEmit functions for MipsISD::ILVL.
3425 case MipsISD::ILVL: return fastEmit_MipsISD_ILVL_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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| D | MipsGenDAGISel.inc | 29624 /* 55663*/ /*SwitchOpcode*/ 52, TARGET_VAL(MipsISD::ILVL),// ->55718
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