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Searched refs:ILVOD (Results 1 – 20 of 20) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsISelLowering.h185 ILVOD, // Interleave odd elements enumerator
DMipsSEISelLowering.cpp1929 return DAG.getNode(MipsISD::ILVOD, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2627 return DAG.getNode(MipsISD::ILVOD, SDLoc(Op), ResTy, Wt, Ws); in lowerVECTOR_SHUFFLE_ILVOD()
DMipsISelLowering.cpp215 case MipsISD::ILVOD: return "MipsISD::ILVOD"; in getTargetNodeName()
DMipsMSAInstrInfo.td51 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsISelLowering.h231 ILVOD, // Interleave odd elements enumerator
DMipsScheduleP5600.td394 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(ILVEV|ILVOD)_[BHWD]$")>;
DMipsSEISelLowering.cpp1911 return DAG.getNode(MipsISD::ILVOD, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2718 return DAG.getNode(MipsISD::ILVOD, SDLoc(Op), ResTy, Wt, Ws); in lowerVECTOR_SHUFFLE_ILVOD()
DMipsScheduleGeneric.td997 def : InstRW<[GenericWriteMSAShortLogic], (instregex "^(ILVEV|ILVOD)_[BHWD]$")>;
DMipsISelLowering.cpp293 case MipsISD::ILVOD: return "MipsISD::ILVOD"; in getTargetNodeName()
DMipsMSAInstrInfo.td43 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
/external/v8/src/mips/
Dconstants-mips.h885 ILVOD = ((7U << 23) + 20), enumerator
Ddisasm-mips.cc2416 case ILVOD: in DecodeTypeMsa3R()
Dsimulator-mips.cc5146 case ILVOD: in Msa3RInstrHelper_shuffle()
5265 case ILVOD: in DecodeTypeMsa3R()
Dassembler-mips.cc3491 V(ilvod, ILVOD) \
/external/v8/src/mips64/
Dconstants-mips64.h919 ILVOD = ((7U << 23) + 20), enumerator
Ddisasm-mips64.cc2730 case ILVOD: in DecodeTypeMsa3R()
Dsimulator-mips64.cc5370 case ILVOD: in Msa3RInstrHelper_shuffle()
5489 case ILVOD: in DecodeTypeMsa3R()
Dassembler-mips64.cc3809 V(ilvod, ILVOD) \
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenFastISel.inc3048 // FastEmit functions for MipsISD::ILVOD.
3426 case MipsISD::ILVOD: return fastEmit_MipsISD_ILVOD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
DMipsGenDAGISel.inc29652 /* 55718*/ /*SwitchOpcode*/ 52, TARGET_VAL(MipsISD::ILVOD),// ->55773