Searched refs:ILVR (Results 1 – 20 of 20) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 187 ILVR, // Interleave right elements enumerator
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| D | MipsSEISelLowering.cpp | 1935 return DAG.getNode(MipsISD::ILVR, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2674 return DAG.getNode(MipsISD::ILVR, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVR()
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| D | MipsISelLowering.cpp | 217 case MipsISD::ILVR: return "MipsISD::ILVR"; in getTargetNodeName()
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| D | MipsMSAInstrInfo.td | 53 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 233 ILVR, // Interleave right elements enumerator
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| D | MipsScheduleP5600.td | 393 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(ILVR|ILVL)_[BHWD]$")>;
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| D | MipsSEISelLowering.cpp | 1917 return DAG.getNode(MipsISD::ILVR, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2765 return DAG.getNode(MipsISD::ILVR, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVR()
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| D | MipsScheduleGeneric.td | 996 def : InstRW<[GenericWriteMSAShortLogic], (instregex "^(ILVR|ILVL)_[BHWD]$")>;
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| D | MipsISelLowering.cpp | 295 case MipsISD::ILVR: return "MipsISD::ILVR"; in getTargetNodeName()
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| D | MipsMSAInstrInfo.td | 45 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
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| /external/v8/src/mips/ |
| D | constants-mips.h | 883 ILVR = ((5U << 23) + 20), enumerator
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| D | disasm-mips.cc | 2410 case ILVR: in DecodeTypeMsa3R()
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| D | simulator-mips.cc | 5138 case ILVR: in Msa3RInstrHelper_shuffle()
5263 case ILVR: in DecodeTypeMsa3R()
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| D | assembler-mips.cc | 3489 V(ilvr, ILVR) \
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 917 ILVR = ((5U << 23) + 20), enumerator
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| D | disasm-mips64.cc | 2724 case ILVR: in DecodeTypeMsa3R()
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| D | simulator-mips64.cc | 5362 case ILVR: in Msa3RInstrHelper_shuffle()
5487 case ILVR: in DecodeTypeMsa3R()
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| D | assembler-mips64.cc | 3807 V(ilvr, ILVR) \
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenFastISel.inc | 3096 // FastEmit functions for MipsISD::ILVR.
3427 case MipsISD::ILVR: return fastEmit_MipsISD_ILVR_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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| D | MipsGenDAGISel.inc | 29680 /* 55773*/ /*SwitchOpcode*/ 52, TARGET_VAL(MipsISD::ILVR),// ->55828
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