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Searched refs:INS (Results 1 – 25 of 78) sorted by relevance

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/external/python/cpython2/Modules/
Dfcntlmodule.c436 #define INS(x) if (ins(d, #x, (long)x)) return -1 macro
570 INS(I_PUSH); in all_ins()
571 INS(I_POP); in all_ins()
572 INS(I_LOOK); in all_ins()
573 INS(I_FLUSH); in all_ins()
574 INS(I_FLUSHBAND); in all_ins()
575 INS(I_SETSIG); in all_ins()
576 INS(I_GETSIG); in all_ins()
577 INS(I_FIND); in all_ins()
578 INS(I_PEEK); in all_ins()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dinsert-const-shuf.ll8 ; CHECK-NEXT: [[INS:%.*]] = shufflevector <4 x float> %x, <4 x float> <float undef, float 1.0000…
9 ; CHECK-NEXT: ret <4 x float> [[INS]]
43 ; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i32 0
44 ; CHECK-NEXT: ret <4 x float> [[INS]]
56 ; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i32 3
57 ; CHECK-NEXT: ret <4 x float> [[INS]]
69 ; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x float> [[SHUF]], float 4.000000e+00, i32 3
70 ; CHECK-NEXT: ret <4 x float> [[INS]]
83 ; CHECK-NEXT: [[INS:%.*]] = insertelement <3 x float> [[SHUF]], float 4.200000e+01, i2 1
84 ; CHECK-NEXT: [[ADD:%.*]] = fadd <3 x float> [[SHUF]], [[INS]]
[all …]
Dbroadcast.ll5 ; CHECK: %[[INS:.*]] = insertelement <4 x float> undef, float %arg, i32 0
6 ; CHECK-NEXT: %[[BCAST:.*]] = shufflevector <4 x float> %[[INS]], <4 x float> undef, <4 x i32> zero…
17 ; CHECK: %[[INS:.*]] = insertelement <4 x float> undef, float %arg, i32 0
18 ; CHECK-NEXT: %[[BCAST:.*]] = shufflevector <4 x float> %[[INS]], <4 x float> undef, <4 x i32> zero…
29 ; CHECK: %[[INS:.*]] = insertelement <4 x float> undef, float %arg, i32 0
30 ; CHECK-NEXT: %[[BCAST:.*]] = shufflevector <4 x float> %[[INS]], <4 x float> undef, <4 x i32> zero…
41 ; CHECK: %[[INS:.*]] = insertelement <4 x float> undef, float %arg, i32 0
42 ; CHECK-NEXT: %[[ADD:.*]] = fadd <4 x float> %[[INS]], %[[INS]]
/external/llvm/test/CodeGen/Mips/
Dfcopysign.ll19 ; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1
20 ; 32R2: mthc1 $[[INS]], $f0
31 ; 64R2: dins $[[INS:[0-9]+]], $[[EXT]], 63, 1
32 ; 64R2: dmtc1 $[[INS]], $f0
52 ; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1
53 ; 32R2: mtc1 $[[INS]], $f0
Dfcopysign-f32-f64.ll26 ; 64R2: ins $[[INS:[0-9]+]], ${{[0-9]+}}, 31, 1
27 ; 64R2: mtc1 $[[INS]], $f0
51 ; 64R2: dins $[[INS:[0-9]+]], ${{[0-9]+}}, 63, 1
52 ; 64R2: dmtc1 $[[INS]], $f0
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dfcopysign.ll24 ; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1
25 ; 32R2: mthc1 $[[INS]], $f0
36 ; 64R2: dinsu $[[INS:[0-9]+]], $[[EXT]], 63, 1
37 ; 64R2: dmtc1 $[[INS]], $f0
57 ; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1
58 ; 32R2: mtc1 $[[INS]], $f0
Dfcopysign-f32-f64.ll26 ; 64R2: ins $[[INS:[0-9]+]], ${{[0-9]+}}, 31, 1
27 ; 64R2: mtc1 $[[INS]], $f0
51 ; 64R2: dinsu $[[INS:[0-9]+]], ${{[0-9]+}}, 63, 1
52 ; 64R2: dmtc1 $[[INS]], $f0
Ddins.ll31 ; Testing of selection INS/DINS instruction
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/instverify/
Dins-pos-size.mir50 %3 = INS killed %2, 17, 17, %0
Dins-pos.mir50 %3 = INS killed %2, 32, 4, %0
Dins-size.mir50 %3 = INS killed %2, 0, 40, %0
/external/libxkbcommon/xkbcommon/test/data/keycodes/
Dxfree86103 <INS> = 106;
388 <INS> = 131;
Devdev99 <INS> = 118;
Devdev-xkbcommon350 alias <INS> = <INSERT>;
/external/libxkbcommon/xkbcommon/test/data/symbols/
Dpc76 key <INS> { [ Insert ] };
/external/libxkbcommon/xkbcommon/test/data/symbols/macintosh_vndr/
Dus91 key <INS> { [ Insert ] };
Dapple15 // key <INS> { [ Help, Insert ] };
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsSEFrameLowering.cpp658 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
666 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
675 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
DMipsSEISelDAGToDAG.cpp301 SDNode *DSPCFWithCarry = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, Ops); in selectAddE()
311 SDNode *DSPCtrlFinal = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, InsOps); in selectAddE()
956 Opcode = Mips::INS; in trySelect()
/external/llvm/lib/Target/Mips/
DMipsSEFrameLowering.cpp633 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
641 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
650 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/GlobalISel/
Darm-param-lowering.ll284 ; CHECK: [[INS:%[0-9]+]]:_(s640) = G_INSERT {{.*}}, {{.*}}(s32), 608
286 …NT:%[0-9]+]]:_(s32), {{.*}}, [[LAST_STACK_ELEMENT:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[INS]](s640)
491 ; CHECK: [[INS:%[0-9]+]]:_(s768) = G_INSERT {{.*}}, {{.*}}(s32), 736
493 …NT:%[0-9]+]]:_(s32), {{.*}}, [[LAST_STACK_ELEMENT:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[INS]](s768)
/external/llvm/test/Transforms/InstCombine/
Dshift.ll598 ; CHECK-NEXT: [[INS:%.*]] = and i128 [[TMP231]], 18446744073709551615
599 ; CHECK-NEXT: ret i128 [[INS]]
615 ; CHECK-NEXT: [[INS:%.*]] = or i128 [[TMP23]], %A
616 ; CHECK-NEXT: [[TMP46:%.*]] = trunc i128 [[INS]] to i64
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dinsert_vector_elt.ll274 ; VI: s_and_b32 s[[INS:[0-9]+]], s[[MASK_SHIFT_LO]], 5
275 ; VI: s_or_b64 s{{\[}}[[RESULT0:[0-9]+]]:[[RESULT1:[0-9]+]]{{\]}}, s{{\[}}[[INS]]:[[MASK_HI]]{{\]}}…
/external/v8/src/mips/
Dconstants-mips.h566 INS = ((0U << 3) + 4), enumerator
1715 case INS: in InstructionType()
/external/libxkbcommon/xkbcommon/test/data/keymaps/
Dno-types.xkb113 <INS> = 118;
897 key <INS> { [ Insert ] };

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