| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 70 ISHST = 10, enumerator
86 case ISHST: return "ishst"; in MemBOptToString()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 133 ISHST = 10, enumerator
149 case ISHST: return "ishst"; in MemBOptToString()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 126 ISHST = 10, enumerator
139 case ISHST: return "ishst"; in MemBOptToString()
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | invalid-DSB-arm.txt | 9 # Inst{3-0} encodes the option: SY, ST, ISH, ISHST, NSH, NSHST, OSH, OSHST.
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| D | invalid-DMB-thumb.txt | 9 # Inst{3-0} encodes the option: SY, ST, ISH, ISHST, NSH, NSHST, OSH, OSHST.
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| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.cc | 521 case ISHST: in GetName()
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| D | instructions-aarch32.h | 1245 ISHST = 0xa, enumerator
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| /external/v8/src/arm/ |
| D | constants-arm.h | 210 ISHST = 0xa, enumerator
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| /external/llvm/lib/Target/ARM/ |
| D | ARM.td | 130 // Swift has ISHST barriers compatible with Atomic Release semantics but weaker
133 "true", "Prefer ISHST barriers">;
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| D | ARMISelLowering.cpp | 3024 Domain = ARM_MB::ISHST; in LowerATOMIC_FENCE()
12372 return makeDMB(Builder, ARM_MB::ISHST); in emitLeadingFence()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARM.td | 176 // Swift has ISHST barriers compatible with Atomic Release semantics but weaker
179 "true", "Prefer ISHST barriers">;
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| D | ARMISelLowering.cpp | 3457 Domain = ARM_MB::ISHST; in LowerATOMIC_FENCE()
14355 return makeDMB(Builder, ARM_MB::ISHST); in emitLeadingFence()
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| /external/vixl/test/aarch32/ |
| D | test-disasm-a32.cc | 3785 COMPARE_BOTH(Dmb(ISHST), "dmb ishst\n"); in TEST()
3795 COMPARE_BOTH(Dsb(ISHST), "dsb ishst\n"); in TEST()
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| D | test-assembler-aarch32.cc | 4391 __ Dmb(ISHST); in TEST()
4401 __ Dsb(ISHST); in TEST()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 2279 .Case("shst", ARM_MB::ISHST) in parseMemBarrierOptOperand()
2280 .Case("ishst", ARM_MB::ISHST) in parseMemBarrierOptOperand()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 1120 { "ISHST", 7 },
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 4183 .Case("shst", ARM_MB::ISHST) in parseMemBarrierOptOperand()
4184 .Case("ishst", ARM_MB::ISHST) in parseMemBarrierOptOperand()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 3899 .Case("shst", ARM_MB::ISHST) in parseMemBarrierOptOperand()
3900 .Case("ishst", ARM_MB::ISHST) in parseMemBarrierOptOperand()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 2297 DMBOpt = isOnlyStoreBarrier ? ARM_MB::ISHST : ARM_MB::ISH; in LowerMEMBARRIER()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenSubtargetInfo.inc | 270 { "prefer-ishst", "Prefer ISHST barriers", { ARM::FeaturePrefISHSTBarrier }, { } },
|