/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
D | X86BaseInfo.h | 321 Imm64 = 7 << ImmShift, enumerator 436 case X86II::Imm64: return 8; in getSizeOfImm() 452 case X86II::Imm64: in isImmPCRel()
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86BaseInfo.h | 411 Imm64 = 8 << ImmShift, enumerator 584 case X86II::Imm64: return 8; in getSizeOfImm() 601 case X86II::Imm64: in isImmPCRel() 619 case X86II::Imm64: in isImmSigned()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86BaseInfo.h | 464 Imm64 = 9 << ImmShift, enumerator 604 case X86II::Imm64: return 8; in getSizeOfImm() 622 case X86II::Imm64: in isImmPCRel() 641 case X86II::Imm64: in isImmSigned()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 4311 uint64_t Imm64; in Select() local 4335 if (isInt64Immediate(N->getOperand(1).getNode(), Imm64) && in Select() 4336 isMask_64(Imm64)) { in Select() 4338 MB = 64 - countTrailingOnes(Imm64); in Select() 4377 if (isInt64Immediate(N->getOperand(1).getNode(), Imm64) && in Select() 4378 isMask_64(~Imm64)) { in Select() 4380 MB = 63 - countTrailingOnes(~Imm64); in Select() 4445 uint64_t Imm64 = 0; in Select() local 4447 if (IsPPC64 && isInt64Immediate(N->getOperand(1), Imm64) && in Select() 4448 (Imm64 & ~0xFFFFFFFFuLL) == 0) { in Select() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrFormats.td | 60 def Imm64 : ImmType<7>; 493 : X86Inst<o, f, Imm64, outs, ins, asm>, REX_W {
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/external/llvm/lib/Target/X86/ |
D | X86InstrFormats.td | 73 def Imm64 : ImmType<8>; 895 : X86Inst<o, f, Imm64, outs, ins, asm, itin>, REX_W { 902 : X86Inst<o, f, Imm64, outs, ins, asm, itin> {
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 2596 uint64_t Imm64; in Select() local 2620 if (isInt64Immediate(N->getOperand(1).getNode(), Imm64) && in Select() 2621 isMask_64(Imm64)) { in Select() 2623 MB = 64 - countTrailingOnes(Imm64); in Select()
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/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerX86BaseImpl.h | 319 AssemblerX86Base<TraitsType>::movabs(const GPRRegister Dst, uint64_t Imm64) { in movabs() argument 321 const bool NeedsRexW = (Imm64 & ~0xFFFFFFFFull) != 0; in movabs() 328 emitInt32(Imm64 & 0xFFFFFFFF); in movabs() 330 emitInt32((Imm64 >> 32) & 0xFFFFFFFF); in movabs()
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D | IceAssemblerX86Base.h | 311 uint64_t Imm64);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86InstrFormats.td | 84 def Imm64 : ImmType<9>; 421 : X86Inst<o, f, Imm64, outs, ins, asm> {
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 539 int64_t Imm64 = static_cast<int64_t>(Imm); 540 return Imm64 >= std::numeric_limits<int32_t>::min() && 541 Imm64 <= std::numeric_limits<int32_t>::max();
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 735 int64_t Imm64 = static_cast<int64_t>(Imm); 736 return Imm64 >= std::numeric_limits<int32_t>::min() && 737 Imm64 <= std::numeric_limits<int32_t>::max();
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenGlobalISel.inc | 424 int64_t Imm64 = static_cast<int64_t>(Imm); 425 return Imm64 >= std::numeric_limits<int32_t>::min() && 426 Imm64 <= std::numeric_limits<int32_t>::max();
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D | AArch64GenDAGISel.inc | 47943 int64_t Imm64 = static_cast<int64_t>(Imm); 47944 return Imm64 >= std::numeric_limits<int32_t>::min() && 47945 Imm64 <= std::numeric_limits<int32_t>::max();
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