/external/llvm/lib/Target/Hexagon/ |
D | HexagonSplitConst32AndConst64.cpp | 112 int64_t ImmValue; in runOnMachineFunction() local 115 ImmValue = *Val.bitcastToAPInt().getRawData(); in runOnMachineFunction() 118 ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() 122 .addImm(ImmValue); in runOnMachineFunction() 132 int64_t ImmValue; in runOnMachineFunction() local 135 ImmValue = *Val.bitcastToAPInt().getRawData(); in runOnMachineFunction() 138 ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() 143 int32_t LowWord = (ImmValue & 0xFFFFFFFF); in runOnMachineFunction() 144 int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF; in runOnMachineFunction()
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D | HexagonHardwareLoops.cpp | 622 int Mask = 0, ImmValue = 0; in getLoopTripCount() local 624 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
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D | HexagonInstrInfo.cpp | 1942 int ImmValue = MO.getImm(); in isConstExtended() local 1944 return (ImmValue < MinValue || ImmValue > MaxValue); in isConstExtended()
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D | HexagonInstrInfoV4.td | 2476 bits<6> ImmValue = !if(MajOp, src2{5-0}, src2{7-2}); 2480 let Inst{22-21} = ImmValue{5-4}; 2482 let Inst{13} = ImmValue{3}; 2484 let Inst{7-5} = ImmValue{2-0};
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelDAGToDAG.cpp | 539 APInt ImmValue; in selectVSplatCommon() local 545 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatCommon() 546 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatCommon() 548 if (( Signed && ImmValue.isSignedIntN(ImmBitSize)) || in selectVSplatCommon() 549 (!Signed && ImmValue.isIntN(ImmBitSize))) { in selectVSplatCommon() 550 Imm = CurDAG->getTargetConstant(ImmValue, SDLoc(N), EltTy); in selectVSplatCommon() 615 APInt ImmValue; in selectVSplatUimmPow2() local 621 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatUimmPow2() 622 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatUimmPow2() 623 int32_t Log2 = ImmValue.exactLogBase2(); in selectVSplatUimmPow2() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonSplitConst32AndConst64.cpp | 81 uint64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local 84 .addImm(ImmValue); in runOnMachineFunction() 88 int64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local 93 int32_t LowWord = (ImmValue & 0xFFFFFFFF); in runOnMachineFunction() 94 int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF; in runOnMachineFunction()
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D | HexagonHardwareLoops.cpp | 655 int Mask = 0, ImmValue = 0; in getLoopTripCount() local 657 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
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D | HexagonInstrInfo.cpp | 2013 int ImmValue = MO.getImm(); in isConstExtended() local 2015 return (ImmValue < MinValue || ImmValue > MaxValue); in isConstExtended()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsSEISelDAGToDAG.cpp | 605 APInt ImmValue; in selectVSplatCommon() local 611 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatCommon() 612 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatCommon() 614 if (( Signed && ImmValue.isSignedIntN(ImmBitSize)) || in selectVSplatCommon() 615 (!Signed && ImmValue.isIntN(ImmBitSize))) { in selectVSplatCommon() 616 Imm = CurDAG->getTargetConstant(ImmValue, SDLoc(N), EltTy); in selectVSplatCommon() 681 APInt ImmValue; in selectVSplatUimmPow2() local 687 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatUimmPow2() 688 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatUimmPow2() 689 int32_t Log2 = ImmValue.exactLogBase2(); in selectVSplatUimmPow2() [all …]
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D | MicroMipsSizeReduction.cpp | 522 int64_t ImmValue; in ReduceADDIUToADDIUSP() local 523 if (!GetImm(MI, Entry.ImmField(), ImmValue)) in ReduceADDIUToADDIUSP() 526 if (!AddiuspImmValue(ImmValue)) in ReduceADDIUToADDIUSP()
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 183 bool loadImmediate(int64_t ImmValue, unsigned DstReg, unsigned SrcReg, 2047 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local 2048 if (isInt<16>(ImmValue)) in tryExpandInstruction() 2059 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local 2060 if (isUInt<16>(ImmValue)) in tryExpandInstruction() 2146 bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, in loadImmediate() argument 2158 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate() 2162 ImmValue = SignExtend64<32>(ImmValue); in loadImmediate() 2187 if (isInt<16>(ImmValue)) { in loadImmediate() 2195 TOut.emitRRI(Mips::DADDiu, DstReg, SrcReg, ImmValue, IDLoc, STI); in loadImmediate() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 219 bool loadImmediate(int64_t ImmValue, unsigned DstReg, unsigned SrcReg, 2513 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local 2514 if (isInt<16>(ImmValue)) in tryExpandInstruction() 2525 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local 2526 if (isUInt<16>(ImmValue)) in tryExpandInstruction() 2643 bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, in loadImmediate() argument 2655 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate() 2659 ImmValue = SignExtend64<32>(ImmValue); in loadImmediate() 2684 if (isInt<16>(ImmValue)) { in loadImmediate() 2692 TOut.emitRRI(Mips::DADDiu, DstReg, SrcReg, ImmValue, IDLoc, STI); in loadImmediate() [all …]
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/external/llvm/lib/Object/ |
D | MachOObjectFile.cpp | 1544 uint8_t ImmValue = Byte & MachO::REBASE_IMMEDIATE_MASK; in moveNext() local 1554 RebaseType = ImmValue; in moveNext() 1561 SegmentIndex = ImmValue; in moveNext() 1578 SegmentOffset += ImmValue * PointerSize; in moveNext() 1586 RemainingLoopCount = ImmValue - 1; in moveNext() 1715 uint8_t ImmValue = Byte & MachO::BIND_IMMEDIATE_MASK; in moveNext() local 1739 Ordinal = ImmValue; in moveNext() 1753 if (ImmValue) { in moveNext() 1754 SignExtended = MachO::BIND_OPCODE_MASK | ImmValue; in moveNext() 1764 Flags = ImmValue; in moveNext() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Object/ |
D | MachOObjectFile.cpp | 3070 uint8_t ImmValue = Byte & MachO::REBASE_IMMEDIATE_MASK; in moveNext() local 3082 RebaseType = ImmValue; in moveNext() 3096 SegmentIndex = ImmValue; in moveNext() 3154 SegmentOffset += ImmValue * PointerSize; in moveNext() 3183 Count = ImmValue; in moveNext() 3184 if (ImmValue != 0) in moveNext() 3185 RemainingLoopCount = ImmValue - 1; in moveNext() 3455 uint8_t ImmValue = Byte & MachO::BIND_IMMEDIATE_MASK; in moveNext() local 3487 Ordinal = ImmValue; in moveNext() 3489 if (ImmValue > O->getLibraryCount()) { in moveNext() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/AsmParser/ |
D | SparcAsmParser.cpp | 516 int32_t ImmValue = RawImmValue; in expandSET() local 521 IsImm && ((is64Bit() ? 0 : -4096) <= ImmValue && ImmValue < 4096); in expandSET() 524 ValExpr = MCConstantExpr::create(ImmValue, getContext()); in expandSET() 554 if (!IsImm || IsEffectivelyImm13 || (ImmValue & 0x3ff)) { in expandSET()
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/external/llvm/lib/Target/Sparc/AsmParser/ |
D | SparcAsmParser.cpp | 488 int32_t ImmValue = RawImmValue; in expandSET() local 493 IsImm && ((is64Bit() ? 0 : -4096) <= ImmValue && ImmValue < 4096); in expandSET() 496 ValExpr = MCConstantExpr::create(ImmValue, getContext()); in expandSET() 526 if (!IsImm || IsEffectivelyImm13 || (ImmValue & 0x3ff)) { in expandSET()
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/external/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.cpp | 208 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr() argument 223 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.cpp | 207 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr() argument 222 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | R600ISelLowering.cpp | 2156 uint64_t ImmValue = 0; in FoldOperand() local 2168 ImmValue = FPC->getValueAPF().bitcastToAPInt().getZExtValue(); in FoldOperand() 2178 ImmValue = Value; in FoldOperand() 2192 Imm = DAG.getTargetConstant(ImmValue, SDLoc(ParentNode), MVT::i32); in FoldOperand()
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/external/llvm/lib/Target/AMDGPU/ |
D | R600ISelLowering.cpp | 2254 uint64_t ImmValue = 0; in FoldOperand() local 2267 ImmValue = FPC->getValueAPF().bitcastToAPInt().getZExtValue(); in FoldOperand() 2277 ImmValue = Value; in FoldOperand() 2291 Imm = DAG.getTargetConstant(ImmValue, SDLoc(ParentNode), MVT::i32); in FoldOperand()
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/external/v8/src/mips/ |
D | constants-mips.h | 1521 inline int32_t ImmValue(int bits) const { in ImmValue() function
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D | simulator-mips.cc | 6353 int32_t imm = this->instr_.ImmValue(bits); in DecodeTypeImmediate() 6365 int32_t imm = this->instr_.ImmValue(bits); in DecodeTypeImmediate()
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/external/v8/src/mips64/ |
D | constants-mips64.h | 1578 inline int32_t ImmValue(int bits) const { in ImmValue() function
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 2362 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr() argument 2379 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 2607 int ImmValue, const MachineInstr *OI) { in isRedundantFlagInstr() argument 2623 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
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