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Searched refs:Immed (Results 1 – 9 of 9) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCMIPeephole.cpp111 int Immed = MI.getOperand(3).getImm(); in simplifyCode() local
113 if (Immed != 1) { in simplifyCode()
152 else if ((Immed == 0 || Immed == 3) in simplifyCode()
158 MI.getOperand(3).setImm(3 - Immed); in simplifyCode()
164 else if (Immed == 2 && FeedImmed == 2 && FeedReg1 == FeedReg2) { in simplifyCode()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCMIPeephole.cpp289 int Immed = MI.getOperand(3).getImm(); in simplifyCode() local
291 if (Immed != 1) { in simplifyCode()
325 if (DefMI && (Immed == 0 || Immed == 3)) { in simplifyCode()
361 else if ((Immed == 0 || Immed == 3) in simplifyCode()
367 MI.getOperand(3).setImm(3 - Immed); in simplifyCode()
373 else if (Immed == 2 && FeedImmed == 2 && FeedReg1 == FeedReg2) { in simplifyCode()
382 } else if ((Immed == 0 || Immed == 3) && DefOpc == PPC::XXPERMDIs && in simplifyCode()
DPPCInstrInfo.cpp1755 int16_t Immed = (int16_t)Value; in optimizeCompareInstr() local
1759 if (Immed == -1 && PredCond == PPC::PRED_GT) in optimizeCompareInstr()
1763 else if (Immed == -1 && PredCond == PPC::PRED_LE) in optimizeCompareInstr()
1766 else if (Immed == 1 && PredCond == PPC::PRED_LT) in optimizeCompareInstr()
1769 else if (Immed == 1 && PredCond == PPC::PRED_GE) in optimizeCompareInstr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstructionSelector.cpp1548 uint64_t Immed; in selectArithImmed() local
1550 Immed = Root.getImm(); in selectArithImmed()
1552 Immed = Root.getCImm()->getZExtValue(); in selectArithImmed()
1560 Immed = Op1.getCImm()->getZExtValue(); in selectArithImmed()
1566 if (Immed >> 12 == 0) { in selectArithImmed()
1568 } else if ((Immed & 0xfff) == 0 && Immed >> 24 == 0) { in selectArithImmed()
1570 Immed = Immed >> 12; in selectArithImmed()
1576 [=](MachineInstrBuilder &MIB) { MIB.addImm(Immed); }, in selectArithImmed()
DAArch64ISelDAGToDAG.cpp272 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectArithImmed() local
275 if (Immed >> 12 == 0) { in SelectArithImmed()
277 } else if ((Immed & 0xfff) == 0 && Immed >> 24 == 0) { in SelectArithImmed()
279 Immed = Immed >> 12; in SelectArithImmed()
285 Val = CurDAG->getTargetConstant(Immed, dl, MVT::i32); in SelectArithImmed()
303 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectNegArithImmed() local
308 if (Immed == 0) in SelectNegArithImmed()
312 Immed = ~((uint32_t)Immed) + 1; in SelectNegArithImmed()
314 Immed = ~Immed + 1ULL; in SelectNegArithImmed()
315 if (Immed & 0xFFFFFFFFFF000000ULL) in SelectNegArithImmed()
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DAArch64ISelLowering.cpp8376 bool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const { in isLegalAddImmediate()
8377 if (Immed == std::numeric_limits<int64_t>::min()) { in isLegalAddImmediate()
8378 LLVM_DEBUG(dbgs() << "Illegal add imm " << Immed in isLegalAddImmediate()
8383 Immed = std::abs(Immed); in isLegalAddImmediate()
8384 bool IsLegal = ((Immed >> 12) == 0 || in isLegalAddImmediate()
8385 ((Immed & 0xfff) == 0 && Immed >> 24 == 0)); in isLegalAddImmediate()
8386 LLVM_DEBUG(dbgs() << "Is " << Immed in isLegalAddImmediate()
8393 bool AArch64TargetLowering::isLegalICmpImmediate(int64_t Immed) const { in isLegalICmpImmediate()
8394 return isLegalAddImmediate(Immed); in isLegalICmpImmediate()
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp263 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectArithImmed() local
266 if (Immed >> 12 == 0) { in SelectArithImmed()
268 } else if ((Immed & 0xfff) == 0 && Immed >> 24 == 0) { in SelectArithImmed()
270 Immed = Immed >> 12; in SelectArithImmed()
276 Val = CurDAG->getTargetConstant(Immed, dl, MVT::i32); in SelectArithImmed()
294 uint64_t Immed = cast<ConstantSDNode>(N.getNode())->getZExtValue(); in SelectNegArithImmed() local
299 if (Immed == 0) in SelectNegArithImmed()
303 Immed = ~((uint32_t)Immed) + 1; in SelectNegArithImmed()
305 Immed = ~Immed + 1ULL; in SelectNegArithImmed()
306 if (Immed & 0xFFFFFFFFFF000000ULL) in SelectNegArithImmed()
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DAArch64ISelLowering.cpp7274 bool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const { in isLegalAddImmediate()
7276 if (Immed == std::numeric_limits<int64_t>::min()) in isLegalAddImmediate()
7279 Immed = std::abs(Immed); in isLegalAddImmediate()
7280 return ((Immed >> 12) == 0 || ((Immed & 0xfff) == 0 && Immed >> 24 == 0)); in isLegalAddImmediate()
7285 bool AArch64TargetLowering::isLegalICmpImmediate(int64_t Immed) const { in isLegalICmpImmediate()
7286 return isLegalAddImmediate(Immed); in isLegalICmpImmediate()
/external/swiftshader/third_party/subzero/src/
DIceAssemblerARM32.cpp1422 constexpr IValueT Immed = 0; in bl() local
1424 emitType05(Cond, Immed, Link); in bl()