| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 87 if (const MCPhysReg *ImpDef = MCID.getImplicitDefs()) in init() local
88 for (; *ImpDef; ++ImpDef) { in init()
89 unsigned R = *ImpDef; in init()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 428 for (const unsigned *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
429 if (Reg == *ImpDef) in getPhysicalRegisterVT()
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| D | ScheduleDAGRRList.cpp | 1030 for (const unsigned *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
1031 if (Reg == *ImpDef) in getPhysicalRegisterVT()
2644 for (const unsigned *ImpDef = ImpDefs; *ImpDef; ++ImpDef) { in canClobberReachingPhysRegUse() local
2648 if (TRI->regsOverlap(*ImpDef, PI->getReg()) && in canClobberReachingPhysRegUse()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 101 if (const MCPhysReg *ImpDef = MCID.getImplicitDefs()) in init() local
102 for (; *ImpDef; ++ImpDef) { in init()
103 unsigned R = *ImpDef; in init()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 443 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
444 if (Reg == *ImpDef) in getPhysicalRegisterVT()
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| D | ScheduleDAGRRList.cpp | 1199 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
1200 if (Reg == *ImpDef) in getPhysicalRegisterVT()
2715 for (const MCPhysReg *ImpDef = ImpDefs; *ImpDef; ++ImpDef) in canClobberReachingPhysRegUse() local
2719 if (TRI->regsOverlap(*ImpDef, SuccPred.getReg()) && in canClobberReachingPhysRegUse()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGFast.cpp | 437 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
438 if (Reg == *ImpDef) in getPhysicalRegisterVT()
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| D | ScheduleDAGRRList.cpp | 1275 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT() local
1276 if (Reg == *ImpDef) in getPhysicalRegisterVT()
2842 for (const MCPhysReg *ImpDef = ImpDefs; *ImpDef; ++ImpDef) in canClobberReachingPhysRegUse() local
2846 if (TRI->regsOverlap(*ImpDef, SuccPred.getReg()) && in canClobberReachingPhysRegUse()
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| /external/llvm/lib/CodeGen/ |
| D | RenameIndependentSubregs.cpp | 321 MachineInstrBuilder ImpDef = BuildMI(*PredMBB, InsertPos, in computeMainRangesFixFlags() local
323 SlotIndex DefIdx = LIS->InsertMachineInstrInMaps(*ImpDef); in computeMainRangesFixFlags()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | RenameIndependentSubregs.cpp | 333 MachineInstrBuilder ImpDef = BuildMI(*PredMBB, InsertPos, in computeMainRangesFixFlags() local
335 SlotIndex DefIdx = LIS->InsertMachineInstrInMaps(*ImpDef); in computeMainRangesFixFlags()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 349 MachineSDNode *ImpDef = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, in Select() local
352 RegSeqArgs[1 + (2 * i)] = SDValue(ImpDef, 0); in Select()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 442 MachineSDNode *ImpDef = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, in SelectBuildVector() local
446 RegSeqArgs[1 + (2 * i)] = SDValue(ImpDef, 0); in SelectBuildVector()
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| D | SIISelLowering.cpp | 8144 SDValue ImpDef = DAG.getCopyToReg(DAG.getEntryNode(), SDLoc(Node), in PostISelFolding() local
8169 Ops.push_back(ImpDef.getValue(1)); in PostISelFolding()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 943 for (unsigned ImpDef : ImpDefs) in MergeOpsUpdate() local
944 MIB.addReg(ImpDef, RegState::ImplicitDefine); in MergeOpsUpdate()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 911 for (unsigned ImpDef : ImpDefs) in MergeOpsUpdate() local
912 MIB.addReg(ImpDef, RegState::ImplicitDefine); in MergeOpsUpdate()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 823 SDValue ImpDef = SDValue( in Widen() local
826 TargetOpcode::INSERT_SUBREG, dl, MVT::i64, ImpDef, N, SubReg); in Widen()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 766 SDValue ImpDef = SDValue( in Widen() local
769 TargetOpcode::INSERT_SUBREG, dl, MVT::i64, ImpDef, N, SubReg); in Widen()
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