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Searched refs:InstRWs (Results 1 – 10 of 10) sorted by relevance

/external/llvm/utils/TableGen/
DCodeGenSchedule.cpp560 const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs; in collectSchedClasses()
708 const RecVec &RWDefs = SchedClasses[OldSCIdx].InstRWs; in createInstRWClass()
723 SchedClasses[OldSCIdx].InstRWs.push_back(InstRWDef); in createInstRWClass()
749 for (RecIter RI = SchedClasses[OldSCIdx].InstRWs.begin(), in createInstRWClass()
750 RE = SchedClasses[OldSCIdx].InstRWs.end(); RI != RE; ++RI) { in createInstRWClass()
757 SC.InstRWs.push_back(*RI); in createInstRWClass()
762 SC.InstRWs.push_back(InstRWDef); in createInstRWClass()
856 if (!SchedClasses[Idx].InstRWs.empty()) in inferSchedClasses()
894 for (unsigned I = 0, E = SchedClasses[SCIdx].InstRWs.size(); I != E; ++I) { in inferFromInstRWs()
895 assert(SchedClasses[SCIdx].InstRWs.size() == E && "InstrRWs was mutated!"); in inferFromInstRWs()
[all …]
DCodeGenSchedule.h143 RecVec InstRWs; member
DSubtargetEmitter.cpp854 if (!SC.InstRWs.empty()) { in GenSchedClassTables()
858 for (Record *RW : SC.InstRWs) { in GenSchedClassTables()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DCodeGenSchedule.cpp670 const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs; in collectSchedClasses()
804 const RecVec &RWDefs = SchedClasses[OldSCIdx].InstRWs; in createInstRWClass()
830 SchedClasses[OldSCIdx].InstRWs.push_back(InstRWDef); in createInstRWClass()
850 for (Record *OldRWDef : SchedClasses[OldSCIdx].InstRWs) { in createInstRWClass()
860 SC.InstRWs.push_back(OldRWDef); in createInstRWClass()
866 SC.InstRWs.push_back(InstRWDef); in createInstRWClass()
962 if (!SchedClasses[Idx].InstRWs.empty()) in inferSchedClasses()
998 for (unsigned I = 0, E = SchedClasses[SCIdx].InstRWs.size(); I != E; ++I) { in inferFromInstRWs()
999 assert(SchedClasses[SCIdx].InstRWs.size() == E && "InstrRWs was mutated!"); in inferFromInstRWs()
1000 Record *Rec = SchedClasses[SCIdx].InstRWs[I]; in inferFromInstRWs()
[all …]
DCodeGenSchedule.h141 RecVec InstRWs; member
DSubtargetEmitter.cpp1034 if (!SC.InstRWs.empty()) { in GenSchedClassTables()
1038 for (Record *RW : SC.InstRWs) { in GenSchedClassTables()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SchedA53.td198 // Subtarget-specific InstRWs.
DAArch64SchedA57.td66 // evolves, InstRWs will be used to override some of these SchedAliases.
/external/llvm/lib/Target/AArch64/
DAArch64SchedA53.td196 // Subtarget-specific InstRWs.
DAArch64SchedA57.td64 // evolves, InstRWs will be used to override some of these SchedAliases.