| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1092 for (unsigned IntReg = LargestIntReg - 1; in computeRegisterProperties() local
1093 IntReg >= (unsigned)MVT::i1; --IntReg) { in computeRegisterProperties()
1094 MVT IVT = (MVT::SimpleValueType)IntReg; in computeRegisterProperties()
1096 LegalIntReg = IntReg; in computeRegisterProperties()
1098 RegisterTypeForVT[IntReg] = TransformToType[IntReg] = in computeRegisterProperties()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1322 for (unsigned IntReg = LargestIntReg - 1; in computeRegisterProperties() local
1323 IntReg >= (unsigned)MVT::i1; --IntReg) { in computeRegisterProperties()
1324 MVT IVT = (MVT::SimpleValueType)IntReg; in computeRegisterProperties()
1326 LegalIntReg = IntReg; in computeRegisterProperties()
1328 RegisterTypeForVT[IntReg] = TransformToType[IntReg] = in computeRegisterProperties()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 817 unsigned IntReg = FastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in SelectFNeg() local
819 if (IntReg == 0) in SelectFNeg()
823 IntReg, /*Kill=*/true, in SelectFNeg()
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| D | TargetLowering.cpp | 782 for (unsigned IntReg = LargestIntReg - 1; in computeRegisterProperties() local
783 IntReg >= (unsigned)MVT::i1; --IntReg) { in computeRegisterProperties()
784 EVT IVT = (MVT::SimpleValueType)IntReg; in computeRegisterProperties()
786 LegalIntReg = IntReg; in computeRegisterProperties()
788 RegisterTypeForVT[IntReg] = TransformToType[IntReg] = in computeRegisterProperties()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 1500 unsigned IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg() local
1502 if (!IntReg) in selectFNeg()
1506 IntVT.getSimpleVT(), ISD::XOR, IntReg, /*IsKill=*/true, in selectFNeg()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1384 unsigned IntReg = ARMMoveToIntReg(DstVT, ResultReg); in SelectFPToSI() local
1385 if (IntReg == 0) return false; in SelectFPToSI()
1387 UpdateValueMap(I, IntReg); in SelectFPToSI()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1162 unsigned IntReg = PPCMoveToIntReg(I, DstVT, DestReg, IsSigned); in SelectFPToI() local
1163 if (IntReg == 0) in SelectFPToI()
1166 updateValueMap(I, IntReg); in SelectFPToI()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1247 unsigned IntReg = PPCSubTarget->hasSPE() ? DestReg : in SelectFPToI() local
1250 if (IntReg == 0) in SelectFPToI()
1253 updateValueMap(I, IntReg); in SelectFPToI()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 1705 unsigned IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg() local
1707 if (!IntReg) in selectFNeg()
1711 IntVT.getSimpleVT(), ISD::XOR, IntReg, /*IsKill=*/true, in selectFNeg()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1603 unsigned IntReg = ARMMoveToIntReg(DstVT, ResultReg); in SelectFPToI() local
1604 if (IntReg == 0) return false; in SelectFPToI()
1606 updateValueMap(I, IntReg); in SelectFPToI()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 1619 unsigned IntReg = ARMMoveToIntReg(DstVT, ResultReg); in SelectFPToI() local
1620 if (IntReg == 0) return false; in SelectFPToI()
1622 updateValueMap(I, IntReg); in SelectFPToI()
|