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Searched refs:Intr (Results 1 – 25 of 37) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.h40 unsigned Intr; member
44 const RsrcIntrinsic *lookupRsrcIntrinsic(unsigned Intr);
47 unsigned Intr; member
50 const D16ImageDimIntrinsic *lookupD16ImageDimIntrinsic(unsigned Intr);
53 unsigned Intr; member
57 const ImageDimIntrinsicInfo *getImageDimIntrinsicInfo(unsigned Intr);
DAMDGPUSearchableTables.td15 Intrinsic Intr = !cast<Intrinsic>(intr);
22 let Fields = ["Intr", "RsrcArg", "IsImage"];
24 let PrimaryKey = ["Intr"];
35 Intrinsic Intr = intr;
40 let Fields = ["Intr"];
42 let PrimaryKey = ["Intr"];
DAMDGPUPromoteAlloca.cpp851 IntrinsicInst *Intr = cast<IntrinsicInst>(Call); in handleAlloca() local
852 Builder.SetInsertPoint(Intr); in handleAlloca()
853 switch (Intr->getIntrinsicID()) { in handleAlloca()
857 Intr->eraseFromParent(); in handleAlloca()
860 MemCpyInst *MemCpy = cast<MemCpyInst>(Intr); in handleAlloca()
864 Intr->eraseFromParent(); in handleAlloca()
868 MemMoveInst *MemMove = cast<MemMoveInst>(Intr); in handleAlloca()
872 Intr->eraseFromParent(); in handleAlloca()
876 MemSetInst *MemSet = cast<MemSetInst>(Intr); in handleAlloca()
880 Intr->eraseFromParent(); in handleAlloca()
[all …]
DSIISelLowering.h61 SDValue lowerImage(SDValue Op, const AMDGPU::ImageDimIntrinsicInfo *Intr,
162 unsigned isCFIntrinsic(const SDNode *Intr) const;
DMIMGInstructions.td546 Intrinsic Intr = I;
553 let Fields = ["Intr", "BaseOpcode", "Dim"];
557 let PrimaryKey = ["Intr"];
DSIISelLowering.cpp3849 unsigned SITargetLowering::isCFIntrinsic(const SDNode *Intr) const { in isCFIntrinsic()
3850 if (Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN) { in isCFIntrinsic()
3851 switch (cast<ConstantSDNode>(Intr->getOperand(1))->getZExtValue()) { in isCFIntrinsic()
3921 SDNode *Intr = BRCOND.getOperand(1).getNode(); in LowerBRCOND() local
3926 if (Intr->getOpcode() == ISD::SETCC) { in LowerBRCOND()
3928 SetCC = Intr; in LowerBRCOND()
3929 Intr = SetCC->getOperand(0).getNode(); in LowerBRCOND()
3944 unsigned CFNode = isCFIntrinsic(Intr); in LowerBRCOND()
3950 bool HaveChain = Intr->getOpcode() == ISD::INTRINSIC_VOID || in LowerBRCOND()
3951 Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN; in LowerBRCOND()
[all …]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Transforms/InstCombine/
DInstCombineTables.inc2 const AMDGPUImageDMaskIntrinsic *getAMDGPUImageDMaskIntrinsic(unsigned Intr);
277 const AMDGPUImageDMaskIntrinsic *getAMDGPUImageDMaskIntrinsic(unsigned Intr) {
278 if ((Intr < Intrinsic::amdgcn_image_getlod_1d) ||
279 (Intr > Intrinsic::amdgcn_image_sample_o_cube))
283 unsigned Intr;
285 KeyType Key = { Intr };
289 if (LHS.Intr < RHS.Intr)
291 if (LHS.Intr > RHS.Intr)
297 Key.Intr != Idx->Intr)
/external/swiftshader/third_party/LLVM/test/TableGen/
Dcast.td67 multiclass arith<bits<8> opcode, string asmstr, string Intr> {
70 … [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_ps")) VR128:$src1, VR128:$src2))]>;
74 … [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_pd")) VR128:$src1, VR128:$src2))]>;
79 class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> :
82 [(set VR128:$dst, (Intr VR128:$src1, VR128:$src2))]>;
85 multiclass arith_int<bits<8> opcode, string asmstr, string Intr> {
86 def PS_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_ps"))>;
88 def PD_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_pd"))>;
/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/
Dcast.td72 multiclass arith<bits<8> opcode, string asmstr, string Intr> {
75 … [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_ps")) VR128:$src1, VR128:$src2))]>;
79 … [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_pd")) VR128:$src1, VR128:$src2))]>;
84 class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> :
87 [(set VR128:$dst, (Intr VR128:$src1, VR128:$src2))]>;
90 multiclass arith_int<bits<8> opcode, string asmstr, string Intr> {
91 def PS_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_ps"))>;
93 def PD_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_pd"))>;
Dsearchabletables-intrinsic.td48 let SearchableFields = ["Intr"];
51 Intrinsic Intr = !cast<Intrinsic>(intr);
68 // CHECK-LABEL: lookupTableByIntr(unsigned Intr) {
/external/llvm/test/TableGen/
Dcast.td72 multiclass arith<bits<8> opcode, string asmstr, string Intr> {
75 … [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_ps")) VR128:$src1, VR128:$src2))]>;
79 … [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_pd")) VR128:$src1, VR128:$src2))]>;
84 class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> :
87 [(set VR128:$dst, (Intr VR128:$src1, VR128:$src2))]>;
90 multiclass arith_int<bits<8> opcode, string asmstr, string Intr> {
91 def PS_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_ps"))>;
93 def PD_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_pd"))>;
/external/llvm/lib/Target/AMDGPU/
DAMDGPUPromoteAlloca.cpp770 IntrinsicInst *Intr = dyn_cast<IntrinsicInst>(Call); in handleAlloca() local
771 if (!Intr) { in handleAlloca()
792 Builder.SetInsertPoint(Intr); in handleAlloca()
793 switch (Intr->getIntrinsicID()) { in handleAlloca()
797 Intr->eraseFromParent(); in handleAlloca()
800 MemCpyInst *MemCpy = cast<MemCpyInst>(Intr); in handleAlloca()
804 Intr->eraseFromParent(); in handleAlloca()
808 MemMoveInst *MemMove = cast<MemMoveInst>(Intr); in handleAlloca()
812 Intr->eraseFromParent(); in handleAlloca()
816 MemSetInst *MemSet = cast<MemSetInst>(Intr); in handleAlloca()
[all …]
DSIISelLowering.cpp1315 bool SITargetLowering::isCFIntrinsic(const SDNode *Intr) const { in isCFIntrinsic()
1316 if (Intr->getOpcode() != ISD::INTRINSIC_W_CHAIN) in isCFIntrinsic()
1319 switch (cast<ConstantSDNode>(Intr->getOperand(1))->getZExtValue()) { in isCFIntrinsic()
1365 SDNode *Intr = BRCOND.getOperand(1).getNode(); in LowerBRCOND() local
1370 if (Intr->getOpcode() == ISD::SETCC) { in LowerBRCOND()
1372 SetCC = Intr; in LowerBRCOND()
1373 Intr = SetCC->getOperand(0).getNode(); in LowerBRCOND()
1381 if (!isCFIntrinsic(Intr)) { in LowerBRCOND()
1392 ArrayRef<EVT> Res(Intr->value_begin() + 1, Intr->value_end()); in LowerBRCOND()
1397 Ops.append(Intr->op_begin() + 1, Intr->op_end()); in LowerBRCOND()
[all …]
DSIISelLowering.h72 bool isCFIntrinsic(const SDNode *Intr) const;
/external/clang/utils/TableGen/
DNeonEmitter.cpp471 Intrinsic &Intr; member in __anon56007b1a0111::Intrinsic::DagEmitter
475 DagEmitter(Intrinsic &Intr, StringRef CallPrefix) : in DagEmitter() argument
476 Intr(Intr), CallPrefix(CallPrefix) { in DagEmitter()
1497 Intrinsic &Callee = Intr.Emitter.getIntrinsic(N, Types); in emitDagCall()
1501 Intr.Dependencies.insert(&Callee); in emitDagCall()
1531 assert_with_loc(Intr.Variables.find(DI->getArgName(ArgIdx)) != in emitDagCast()
1532 Intr.Variables.end(), in emitDagCast()
1534 castToType = Intr.Variables[DI->getArgName(ArgIdx)].getType(); in emitDagCast()
1540 castToType = Intr.getReturnType(); in emitDagCast()
1564 while (Intr.Variables.find(N) != Intr.Variables.end()) in emitDagCast()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/
DInstCombineTables.td6 let Fields = ["Intr"];
8 let PrimaryKey = ["Intr"];
/external/llvm/lib/Target/Hexagon/
DHexagonOptimizeSZextends.cpp124 Value *Intr = Shl->getOperand(0); in runOnFunction() local
132 if (IntrinsicInst *I = dyn_cast<IntrinsicInst>(Intr)) { in runOnFunction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonOptimizeSZextends.cpp119 Value *Intr = Shl->getOperand(0); in runOnFunction() local
127 if (IntrinsicInst *I = dyn_cast<IntrinsicInst>(Intr)) { in runOnFunction()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DSearchableTableEmitter.cpp136 std::unique_ptr<CodeGenIntrinsic> &Intr = Intrinsics[I]; in getIntrinsic() local
137 if (!Intr) in getIntrinsic()
138 Intr = make_unique<CodeGenIntrinsic>(cast<DefInit>(I)->getDef()); in getIntrinsic()
139 return *Intr; in getIntrinsic()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/
DGVNHoist.cpp1111 if (auto *Intr = dyn_cast<IntrinsicInst>(Call)) { in hoistExpressions() local
1112 if (isa<DbgInfoIntrinsic>(Intr) || in hoistExpressions()
1113 Intr->getIntrinsicID() == Intrinsic::assume || in hoistExpressions()
1114 Intr->getIntrinsicID() == Intrinsic::sideeffect) in hoistExpressions()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Utils/
DAMDGPUBaseInfo.cpp964 unsigned Intr; member
966 const SourceOfDivergence *lookupSourceOfDivergence(unsigned Intr);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp2254 static SDValue lowerMSALoadIntr(SDValue Op, SelectionDAG &DAG, unsigned Intr, in lowerMSALoadIntr() argument
2276 unsigned Intr = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue(); in lowerINTRINSIC_W_CHAIN() local
2277 switch (Intr) { in lowerINTRINSIC_W_CHAIN()
2324 return lowerMSALoadIntr(Op, DAG, Intr, Subtarget); in lowerINTRINSIC_W_CHAIN()
2328 static SDValue lowerMSAStoreIntr(SDValue Op, SelectionDAG &DAG, unsigned Intr, in lowerMSAStoreIntr() argument
2351 unsigned Intr = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue(); in lowerINTRINSIC_VOID() local
2352 switch (Intr) { in lowerINTRINSIC_VOID()
2359 return lowerMSAStoreIntr(Op, DAG, Intr, Subtarget); in lowerINTRINSIC_VOID()
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp2175 static SDValue lowerMSALoadIntr(SDValue Op, SelectionDAG &DAG, unsigned Intr) { in lowerMSALoadIntr() argument
2191 unsigned Intr = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue(); in lowerINTRINSIC_W_CHAIN() local
2192 switch (Intr) { in lowerINTRINSIC_W_CHAIN()
2239 return lowerMSALoadIntr(Op, DAG, Intr); in lowerINTRINSIC_W_CHAIN()
2243 static SDValue lowerMSAStoreIntr(SDValue Op, SelectionDAG &DAG, unsigned Intr) { in lowerMSAStoreIntr() argument
2259 unsigned Intr = cast<ConstantSDNode>(Op->getOperand(1))->getZExtValue(); in lowerINTRINSIC_VOID() local
2260 switch (Intr) { in lowerINTRINSIC_VOID()
2267 return lowerMSAStoreIntr(Op, DAG, Intr); in lowerINTRINSIC_VOID()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/
DNVPTXIntrinsics.td1519 multiclass ATOM2P_impl<string AsmStr, Intrinsic Intr,
1526 (Intr Int32Regs:$src, regclass:$b)>;
1529 (Intr Int64Regs:$src, regclass:$b)>;
1536 (Intr Int32Regs:$src, (ImmTy Imm:$b))>;
1539 (Intr Int64Regs:$src, (ImmTy Imm:$b))>;
1542 multiclass ATOM3P_impl<string AsmStr, Intrinsic Intr,
1550 (Intr Int32Regs:$src, regclass:$b, regclass:$c)>;
1553 (Intr Int64Regs:$src, regclass:$b, regclass:$c)>;
1558 (Intr Int32Regs:$src, (ImmTy Imm:$b), regclass:$c)>;
1561 (Intr Int64Regs:$src, (ImmTy Imm:$b), regclass:$c)>;
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/IPO/
DWholeProgramDevirt.cpp864 Constant *Intr = in tryICallBranchFunnel() local
867 auto *CI = CallInst::Create(Intr, JTArgs, "", BB); in tryICallBranchFunnel()

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