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1// RUN: llvm-tblgen %s | FileCheck %s
2// XFAIL: vg_leak
3
4// CHECK: add_ps
5// CHECK: add_ps
6// CHECK: add_ps
7// CHECK-NOT: add_ps
8
9class ValueType<int size, int value> {
10  int Size = size;
11  int Value = value;
12}
13
14def v2i64  : ValueType<128, 22>;   //  2 x i64 vector value
15def v2f64  : ValueType<128, 28>;   //  2 x f64 vector value
16
17class Intrinsic<string name> {
18  string Name = name;
19}
20
21class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
22           list<dag> pattern> {
23  bits<8> Opcode = opcode;
24  dag OutOperands = oopnds;
25  dag InOperands = iopnds;
26  string AssemblyString = asmstr;
27  list<dag> Pattern = pattern;
28}
29
30def ops;
31def outs;
32def ins;
33
34def set;
35
36// Define registers
37class Register<string n> {
38  string Name = n;
39}
40
41class RegisterClass<list<ValueType> regTypes, list<Register> regList> {
42  list<ValueType> RegTypes = regTypes;
43  list<Register> MemberList = regList;
44}
45
46def XMM0: Register<"xmm0">;
47def XMM1: Register<"xmm1">;
48def XMM2: Register<"xmm2">;
49def XMM3: Register<"xmm3">;
50def XMM4: Register<"xmm4">;
51def XMM5: Register<"xmm5">;
52def XMM6: Register<"xmm6">;
53def XMM7: Register<"xmm7">;
54def XMM8:  Register<"xmm8">;
55def XMM9:  Register<"xmm9">;
56def XMM10: Register<"xmm10">;
57def XMM11: Register<"xmm11">;
58def XMM12: Register<"xmm12">;
59def XMM13: Register<"xmm13">;
60def XMM14: Register<"xmm14">;
61def XMM15: Register<"xmm15">;
62
63def VR128 : RegisterClass<[v2i64, v2f64],
64                          [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
65                           XMM8, XMM9, XMM10, XMM11,
66                           XMM12, XMM13, XMM14, XMM15]>;
67
68// Define intrinsics
69def int_x86_sse2_add_ps : Intrinsic<"addps">;
70def int_x86_sse2_add_pd : Intrinsic<"addpd">;
71
72multiclass arith<bits<8> opcode, string asmstr, string Intr> {
73  def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
74                 !strconcat(asmstr, "\t$dst, $src1, $src2"),
75                 [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_ps")) VR128:$src1, VR128:$src2))]>;
76
77  def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
78                 !strconcat(asmstr, "\t$dst, $src1, $src2"),
79                 [(set VR128:$dst, (!cast<Intrinsic>(!strconcat(Intr, "_pd")) VR128:$src1, VR128:$src2))]>;
80}
81
82defm ADD : arith<0x58, "add", "int_x86_sse2_add">;
83
84class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> :
85  Inst<opcode,(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
86       !strconcat(asmstr, "\t$dst, $src1, $src2"),
87       [(set VR128:$dst, (Intr VR128:$src1, VR128:$src2))]>;
88
89
90multiclass arith_int<bits<8> opcode, string asmstr, string Intr> {
91  def PS_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_ps"))>;
92
93  def PD_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_pd"))>;
94}
95
96defm ADD : arith_int<0x58, "add", "int_x86_sse2_add">;
97