| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | LiveRangeCalc.cpp | 43 if (I->Kill.isValid()) in updateLiveIns()
44 I->LI->addRange(LiveRange(Start, I->Kill, VNI)); in updateLiveIns()
58 SlotIndex Kill, in extend() argument
63 assert(Kill.isValid() && "Invalid SlotIndex"); in extend()
67 MachineBasicBlock *KillMBB = Indexes->getMBBFromIndex(Kill.getPrevSlot()); in extend()
68 assert(Kill && "No MBB at Kill"); in extend()
71 if (LI->extendInBlock(Indexes->getMBBStartIdx(KillMBB), Kill)) in extend()
78 VNInfo *VNI = findReachingDefs(LI, KillMBB, Kill, Indexes, DomTree); in extend()
103 SlotIndex Kill, in findReachingDefs() argument
150 Kill = SlotIndex(); in findReachingDefs()
[all …]
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| D | LiveRangeCalc.h | 83 SlotIndex Kill; member
89 : LI(li), DomNode(node), Kill(kill), Value(0) {} in LiveInBlock()
105 SlotIndex Kill,
158 SlotIndex Kill,
208 SlotIndex Kill = SlotIndex()) {
209 LiveIn.push_back(LiveInBlock(LI, DomNode, Kill));
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| D | ExecutionDepsFix.cpp | 147 void Kill(int rx);
203 void ExeDepsFix::Kill(int rx) { in Kill() function in ExeDepsFix
328 Kill(rx); in visitHardInstr()
363 Kill(rx); in visitSoftInstr()
383 Kill(*i); in visitSoftInstr()
416 Kill(*i); in visitSoftInstr()
433 Kill(rx); in visitSoftInstr()
446 Kill(rx); in visitGenericInstr()
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| /external/llvm/lib/CodeGen/ |
| D | LiveRangeCalc.h | 89 SlotIndex Kill; member
95 : LR(LR), DomNode(node), Kill(kill), Value(nullptr) {} in LiveInBlock()
115 SlotIndex Kill, unsigned PhysReg);
232 SlotIndex Kill = SlotIndex()) {
233 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
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| D | LiveRangeCalc.cpp | 223 if (I.Kill.isValid()) in updateFromLiveIns()
225 End = I.Kill; in updateFromLiveIns()
379 LiveIn.back().Kill = Use; in findReachingDefs()
461 if (I.Kill.isValid()) in updateSSA()
462 LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI)); in updateSSA()
472 if (I.Kill.isValid()) in updateSSA()
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| /external/deqp-deps/glslang/Test/baseResults/ |
| D | hlsl.discard.frag.out | 16 0:4 Branch: Kill
34 0:11 Branch: Kill
42 0:13 Branch: Kill
72 0:4 Branch: Kill
90 0:11 Branch: Kill
98 0:13 Branch: Kill
166 Kill
185 Kill
190 Kill
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreRegisterInfo.cpp | 109 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
116 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
122 .addReg(ScratchOffset, RegState::Kill); in InsertFPConstInst()
185 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
186 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
192 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
193 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
198 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
199 .addReg(ScratchOffset, RegState::Kill); in InsertSPConstInst()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| D | XCoreRegisterInfo.cpp | 109 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
116 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
122 .addReg(ScratchOffset, RegState::Kill); in InsertFPConstInst()
185 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
186 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
192 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
193 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
198 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
199 .addReg(ScratchOffset, RegState::Kill); in InsertSPConstInst()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRFrameLowering.cpp | 72 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
81 .addReg(AVR::R1R0, RegState::Kill) in emitPrologue()
88 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
92 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
93 .addReg(AVR::R0, RegState::Kill) in emitPrologue()
132 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
173 .addReg(AVR::R0, RegState::Kill); in emitEpilogue()
209 .addReg(AVR::R29R28, RegState::Kill) in emitEpilogue()
216 .addReg(AVR::R29R28, RegState::Kill); in emitEpilogue()
405 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
[all …]
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| D | AVRRegisterInfo.cpp | 196 .addReg(DstReg, RegState::Kill) in eliminateFrameIndex()
224 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
231 .addReg(AVR::R0, RegState::Kill); in eliminateFrameIndex()
236 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | LiveRangeCalc.h | 112 SlotIndex Kill; member
118 : LR(LR), DomNode(node), Kill(kill) {} in LiveInBlock()
273 SlotIndex Kill = SlotIndex()) {
274 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 1119 .addReg(Op0, Op0IsKill * RegState::Kill); in FastEmitInst_r()
1122 .addReg(Op0, Op0IsKill * RegState::Kill); in FastEmitInst_r()
1139 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rr()
1140 .addReg(Op1, Op1IsKill * RegState::Kill); in FastEmitInst_rr()
1143 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rr()
1144 .addReg(Op1, Op1IsKill * RegState::Kill); in FastEmitInst_rr()
1161 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rrr()
1162 .addReg(Op1, Op1IsKill * RegState::Kill) in FastEmitInst_rrr()
1163 .addReg(Op2, Op2IsKill * RegState::Kill); in FastEmitInst_rrr()
1166 .addReg(Op0, Op0IsKill * RegState::Kill) in FastEmitInst_rrr()
[all …]
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 608 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
611 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
617 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
621 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
731 .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg()); in splitExt()
771 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
796 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
799 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
802 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
808 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitDouble.cpp | 654 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
657 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
663 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
667 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
772 .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg()); in splitExt()
812 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
837 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
840 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
843 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
849 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | LiveInterval.h | 94 const bool Kill; variable
98 bool Kill) in LiveQueryResult() argument
99 : EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill) in LiveQueryResult()
113 return Kill; in isKill()
485 SlotIndex StartIdx, SlotIndex Kill);
492 VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Kill);
542 bool Kill = false; in Query() local
548 Kill = true; in Query()
550 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
565 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
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| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinFrameLowering.cpp | 80 .addReg(BF::RETS, RegState::Kill); in emitPrologue()
82 .addReg(BF::FP, RegState::Kill); in emitPrologue()
87 .addReg(BF::SP, RegState::Kill) in emitPrologue()
88 .addReg(BF::P1, RegState::Kill); in emitPrologue()
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| D | BlackfinRegisterInfo.cpp | 109 .addReg(Reg, RegState::Kill) in adjustRegister()
110 .addReg(ScratchReg, RegState::Kill); in adjustRegister()
116 .addReg(Reg, RegState::Kill) in adjustRegister()
117 .addReg(ScratchReg, RegState::Kill); in adjustRegister()
271 .addReg(ScratchReg, RegState::Kill) in eliminateFrameIndex()
314 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
318 .addReg(ScratchReg, RegState::Kill) in eliminateFrameIndex()
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| /external/syzkaller/vm/gce/ |
| D | gce.go | 244 con.Process.Kill()
250 con.Process.Kill()
265 con.Process.Kill()
291 con.Process.Kill()
292 ssh.Process.Kill()
315 con.Process.Kill()
316 ssh.Process.Kill()
392 con.Process.Kill()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 418 .addReg(NegSizeReg1, RegState::Kill); in lowerDynamicAlloc()
423 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
443 .addReg(NegSizeReg1, RegState::Kill); in lowerDynamicAlloc()
448 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
520 .addReg(Reg1, RegState::Kill) in lowerCRSpilling()
527 .addReg(Reg, RegState::Kill), in lowerCRSpilling()
566 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore()
571 .addReg(Reg, RegState::Kill); in lowerCRRestore()
609 .addReg(Reg1, RegState::Kill) in lowerCRBitSpilling()
614 .addReg(Reg, RegState::Kill), in lowerCRBitSpilling()
[all …]
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| /external/llvm/include/llvm/CodeGen/ |
| D | LiveInterval.h | 91 const bool Kill; variable
95 bool Kill) in LiveQueryResult() argument
96 : EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill) in LiveQueryResult()
110 return Kill; in isKill()
507 bool Kill = false; in Query() local
513 Kill = true; in Query()
515 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
530 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 497 .addReg(NegSizeReg1, RegState::Kill); in lowerDynamicAlloc()
502 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
522 .addReg(NegSizeReg1, RegState::Kill); in lowerDynamicAlloc()
527 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
601 .addReg(Reg1, RegState::Kill) in lowerCRSpilling()
608 .addReg(Reg, RegState::Kill), in lowerCRSpilling()
647 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore()
652 .addReg(Reg, RegState::Kill); in lowerCRRestore()
690 .addReg(Reg1, RegState::Kill) in lowerCRBitSpilling()
695 .addReg(Reg, RegState::Kill), in lowerCRBitSpilling()
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 108 .addReg(FlatScrInitHi, RegState::Kill); in emitPrologue()
120 .addReg(FlatScrInitLo, RegState::Kill) in emitPrologue()
218 .addReg(PreloadedScratchWaveOffsetReg, RegState::Kill); in emitPrologue()
236 .addReg(Lo, RegState::Kill); in emitPrologue()
238 .addReg(Hi, RegState::Kill); in emitPrologue()
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| /external/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.cpp | 186 .addReg(DstReg, RegState::Kill) in eliminateFrameIndex()
214 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
221 .addReg(AVR::R0, RegState::Kill); in eliminateFrameIndex()
226 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 32 Kill = 0x8, enumerator
38 ImplicitKill = Implicit | Kill
64 flags & RegState::Kill,
253 return B ? RegState::Kill : 0; in getKillRegState()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | Thumb1RegisterInfo.cpp | 122 .addReg(LdReg, RegState::Kill).setMIFlags(MIFlags); in emitThumbRegPlusImmInReg()
134 MIB.addReg(BaseReg).addReg(LdReg, RegState::Kill); in emitThumbRegPlusImmInReg()
136 MIB.addReg(LdReg).addReg(BaseReg, RegState::Kill); in emitThumbRegPlusImmInReg()
244 AddDefaultPred(MIB.addReg(BaseReg, RegState::Kill).addImm(ThisVal)); in emitThumbRegPlusImmediate()
247 .addReg(BaseReg, RegState::Kill)) in emitThumbRegPlusImmediate()
292 .addReg(DestReg, RegState::Kill) in emitThumbRegPlusImmediate()
361 .addReg(DestReg, RegState::Kill)); in emitThumbConstant()
561 .addReg(Reg, RegState::Kill)); in saveScavengerRegister()
585 addReg(Reg, RegState::Define).addReg(ARM::R12, RegState::Kill)); in saveScavengerRegister()
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