| /external/clang/lib/Basic/ |
| D | Targets.cpp | 4613 uint32_t LDREX; member in __anon2066a7b00111::ARMTargetInfo
4833 : TargetInfo(Triple), FPMath(FP_Default), IsAAPCS(true), LDREX(0), in ARMTargetInfo()
5015 LDREX = 0; in handleTargetFeatures()
5017 LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B ; in handleTargetFeatures()
5019 LDREX = LDREX_W; in handleTargetFeatures()
5023 LDREX = LDREX_W | LDREX_H | LDREX_B ; in handleTargetFeatures()
5025 LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B ; in handleTargetFeatures()
5028 LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B ; in handleTargetFeatures()
5143 if (LDREX) in getTargetDefines()
5144 Builder.defineMacro("__ARM_FEATURE_LDREX", "0x" + llvm::utohexstr(LDREX)); in getTargetDefines()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMScheduleSwift.td | 359 "t2LDR(H|B)(i8|i12|s|pci)", "LDREX", "tLDR[BH](r|i|spi|pci|pciASM)",
|
| D | ARMScheduleR52.td | 293 "t2LDR(H|B)(i8|i12|s|pci)", "LDREX", "t2LDREX",
|
| D | ARMExpandPseudoInsts.cpp | 1906 return ExpandCMP_SWAP(MBB, MBBI, ARM::LDREX, ARM::STREX, 0, NextMBBI); in ExpandMI()
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| D | ARMScheduleA57.td | 139 "(t2)?STL", "(t2)?LDREX", "(t2)?STREX", "MEMCPY")>;
|
| D | ARMInstrInfo.td | 4954 def LDREX : AIldrex<0b00, (outs GPR:$Rt), (ins addr_offset_none:$addr),
5064 // FIXME Use InstAlias to generate LDREX/STREX pairs instead.
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMScheduleSwift.td | 342 "t2LDR(H|B)(i8|i12|s|pci)", "LDREX", "tLDR[BH](r|i|spi|pci|pciASM)",
|
| D | ARMExpandPseudoInsts.cpp | 1647 return ExpandCMP_SWAP(MBB, MBBI, ARM::LDREX, ARM::STREX, 0, NextMBBI); in ExpandMI()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | Atomics.rst | 447 which take some sort of exclusive lock on a cache line (``LDREX`` and ``STREX``
|
| /external/llvm/docs/ |
| D | Atomics.rst | 447 which take some sort of exclusive lock on a cache line (``LDREX`` and ``STREX``
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 5077 ldrOpc = isThumb2 ? ARM::t2LDREX : ARM::LDREX; in EmitAtomicCmpSwap()
5181 ldrOpc = isThumb2 ? ARM::t2LDREX : ARM::LDREX; in EmitAtomicBinary()
5290 ldrOpc = isThumb2 ? ARM::t2LDREX : ARM::LDREX; in EmitAtomicBinaryMinMax()
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 607 # LDREX/LDREXB/LDREXH/LDREXD
|
| D | thumb2.txt | 627 # LDREX/LDREXB/LDREXH/LDREXD
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 688 # LDREX/LDREXB/LDREXH/LDREXD
|
| D | thumb2.txt | 707 # LDREX/LDREXB/LDREXH/LDREXD
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 688 # LDREX/LDREXB/LDREXH/LDREXD
|
| D | thumb2.txt | 707 # LDREX/LDREXB/LDREXH/LDREXD
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 761 @ LDREX/LDREXB/LDREXH/LDREXD
|
| D | basic-thumb2-instructions.s | 748 @ LDREX/LDREXB/LDREXH/LDREXD
|
| /external/capstone/arch/ARM/ |
| D | ARMGenAsmWriter.inc | 180 19345U, // LDREX
2973 72U, // LDREX
7262 // LDA, LDAB, LDAEX, LDAEXB, LDAEXH, LDAH, LDRBT_POST, LDREX, LDREXB, LDR...
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1168 540296U, // LDREX
4388 8U, // LDREX
|
| D | ARMGenMCCodeEmitter.inc | 661 UINT64_C(26218399), // LDREX
8943 case ARM::LDREX:
11934 Feature_IsARM | 0, // LDREX = 648
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1191 @ LDREX/LDREXB/LDREXH/LDREXD
|
| D | basic-thumb2-instructions.s | 1051 @ LDREX/LDREXB/LDREXH/LDREXD
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1193 @ LDREX/LDREXB/LDREXH/LDREXD
|