| /external/toybox/toys/lsb/ |
| D | README | 4 http://refspecs.linuxfoundation.org/LSB_4.1.0/LSB-Core-generic/LSB-Core-generic/cmdbehav.html
7 http://refspecs.linuxfoundation.org/LSB_4.1.0/LSB-Core-generic/LSB-Core-generic.html
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | vcvt-oversize.ll | 6 ; CHECK-DAG: fadd v[[LSB:[0-9]+]].4s, v1.4s, v1.4s
8 ; CHECK-DAG: fcvtzu v[[LSB2:[0-9]+]].4s, v[[LSB]].4s
10 ; CHECK-DAG: xtn v[[TMP:[0-9]+]].4h, v[[LSB]].4s
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | vcvt-oversize.ll | 6 ; CHECK-DAG: fadd v[[LSB:[0-9]+]].4s, v1.4s, v1.4s
8 ; CHECK-DAG: fcvtzu v[[LSB2:[0-9]+]].4s, v[[LSB]].4s
10 ; CHECK-DAG: xtn v[[TMP:[0-9]+]].4h, v[[LSB]].4s
|
| /external/mesa3d/src/gallium/drivers/swr/rasterizer/common/ |
| D | intrin.h | 77 const UINT LSB = (UINT)((int)(a << 31) >> 31); in pdep_u32()
80 result |= LSB & lowest; in pdep_u32()
|
| /external/ltp/testcases/open_posix_testsuite/Documentation/ |
| D | HOWTO_ResultCodes | 7 These result codes are a subset of the LSB result codes and, for
8 consistency with LSB, are given the same number.
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 1353 static bool isStringOfOnes(uint64_t Mask, unsigned &LSB, unsigned &Length) { in isStringOfOnes() argument
1357 LSB = First; in isStringOfOnes()
1373 unsigned LSB, Length; in isRxSBGMask() local
1374 if (isStringOfOnes(Mask, LSB, Length)) { in isRxSBGMask()
1375 Start = 63 - (LSB + Length - 1); in isRxSBGMask()
1376 End = 63 - LSB; in isRxSBGMask()
1382 if (isStringOfOnes(Mask ^ allOnes(BitSize), LSB, Length)) { in isRxSBGMask()
1383 assert(LSB > 0 && "Bottom bit must be set"); in isRxSBGMask()
1384 assert(LSB + Length < BitSize && "Top bit must be set"); in isRxSBGMask()
1385 Start = 63 - (LSB - 1); in isRxSBGMask()
[all …]
|
| /external/u-boot/doc/ |
| D | README.imx27 | 10 reversed MAC byte order (i.e. LSB first).
|
| /external/toybox/toys/other/ |
| D | README | 3 These are commands not present in Posix or LSB.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/ValueTracking/ |
| D | func-ptr-lsb.ll | 11 ; which store ARM/Thumb state in the LSB
|
| /external/ltp/testcases/commands/file/ |
| D | file01.sh | 39 *Data:*"little endian"*) TEST_ARCH=LSB;;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 1666 static bool isStringOfOnes(uint64_t Mask, unsigned &LSB, unsigned &Length) { in isStringOfOnes() argument
1670 LSB = First; in isStringOfOnes()
1686 unsigned LSB, Length; in isRxSBGMask() local
1687 if (isStringOfOnes(Mask, LSB, Length)) { in isRxSBGMask()
1688 Start = 63 - (LSB + Length - 1); in isRxSBGMask()
1689 End = 63 - LSB; in isRxSBGMask()
1695 if (isStringOfOnes(Mask ^ allOnes(BitSize), LSB, Length)) { in isRxSBGMask()
1696 assert(LSB > 0 && "Bottom bit must be set"); in isRxSBGMask()
1697 assert(LSB + Length < BitSize && "Top bit must be set"); in isRxSBGMask()
1698 Start = 63 - (LSB - 1); in isRxSBGMask()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | scatter-schedule.ll | 7 ; The right order is "from LSB to MSB", otherwise the semantic is broken.
|
| D | load-slice.ll | 13 ; LSB 0 1 2 3 | 4 5 6 7 MSB
87 ; LSB 0 1 2 3 | 4 5 | 6 7 MSB
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/ |
| D | StringExtras.h | 160 inline uint8_t hexFromNibbles(char MSB, char LSB) { in hexFromNibbles() argument
162 unsigned U2 = hexDigitValue(LSB); in hexFromNibbles()
|
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 170 int LSB = (BitWidth - ImmR) % BitWidth; in printInst() local
174 << ", #" << LSB << ", #" << Width; in printInst()
180 int LSB = (BitWidth - ImmR) % BitWidth; in printInst() local
184 << getRegisterName(Op2.getReg()) << ", #" << LSB << ", #" << Width; in printInst()
189 int LSB = ImmR; in printInst() local
194 << ", #" << LSB << ", #" << Width; in printInst()
|
| /external/boringssl/src/crypto/fipsmodule/modes/ |
| D | gcm_tests.txt | 144 # This nonce results in 0xfff in counter LSB.
|
| /external/llvm/test/CodeGen/X86/ |
| D | load-slice.ll | 13 ; LSB 0 1 2 3 | 4 5 6 7 MSB
87 ; LSB 0 1 2 3 | 4 5 | 6 7 MSB
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 2314 unsigned LSB = Srl_imm; in tryV6T2BitfieldExtractOp() local
2318 if ((LSB + Width + 1) == N->getValueType(0).getSizeInBits()) { in tryV6T2BitfieldExtractOp()
2323 CurDAG->getTargetConstant(LSB, dl, MVT::i32), in tryV6T2BitfieldExtractOp()
2332 CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, LSB), dl, in tryV6T2BitfieldExtractOp()
2340 assert(LSB + Width + 1 <= 32 && "Shouldn't create an invalid ubfx"); in tryV6T2BitfieldExtractOp()
2342 CurDAG->getTargetConstant(LSB, dl, MVT::i32), in tryV6T2BitfieldExtractOp()
2361 int LSB = Srl_imm - Shl_imm; in tryV6T2BitfieldExtractOp() local
2362 if (LSB < 0) in tryV6T2BitfieldExtractOp()
2365 assert(LSB + Width + 1 <= 32 && "Shouldn't create an invalid ubfx"); in tryV6T2BitfieldExtractOp()
2367 CurDAG->getTargetConstant(LSB, dl, MVT::i32), in tryV6T2BitfieldExtractOp()
[all …]
|
| /external/capstone/arch/AArch64/ |
| D | AArch64InstPrinter.c | 70 int LSB; in AArch64_printInst() local
254 LSB = (BitWidth - ImmR) % BitWidth; in AArch64_printInst()
260 printInt32Bang(O, LSB); in AArch64_printInst()
273 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB; in AArch64_printInst()
283 LSB = ImmR; in AArch64_printInst()
289 printInt32Bang(O, LSB); in AArch64_printInst()
302 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = LSB; in AArch64_printInst()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1488 unsigned &LSB, unsigned &MSB, in isBitfieldExtractOpFromAnd() argument
1563 LSB = SrlImm; in isBitfieldExtractOpFromAnd()
1612 SDValue &Opd0, unsigned &LSB, in isSeveralBitsExtractOpFromShr() argument
1649 LSB = SrlImm; in isSeveralBitsExtractOpFromShr()
1944 uint64_t LSB = Imm; in getUsefulBitsFromBFM() local
1952 Mask <<= LSB; in getUsefulBitsFromBFM()
1961 uint64_t LSB = UsefulBits.getBitWidth() - Imm; in getUsefulBitsFromBFM() local
1965 OpUsefulBits <<= LSB; in getUsefulBitsFromBFM()
1970 Mask.lshrInPlace(LSB); in getUsefulBitsFromBFM()
2193 int LSB = countTrailingOnes(NotKnownZero); in tryBitfieldInsertOpFromOrAndImm() local
[all …]
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 2354 unsigned LSB = Srl_imm; in tryV6T2BitfieldExtractOp() local
2358 if ((LSB + Width + 1) == N->getValueType(0).getSizeInBits()) { in tryV6T2BitfieldExtractOp()
2363 CurDAG->getTargetConstant(LSB, dl, MVT::i32), in tryV6T2BitfieldExtractOp()
2372 CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, LSB), dl, in tryV6T2BitfieldExtractOp()
2381 CurDAG->getTargetConstant(LSB, dl, MVT::i32), in tryV6T2BitfieldExtractOp()
2400 int LSB = Srl_imm - Shl_imm; in tryV6T2BitfieldExtractOp() local
2401 if (LSB < 0) in tryV6T2BitfieldExtractOp()
2405 CurDAG->getTargetConstant(LSB, dl, MVT::i32), in tryV6T2BitfieldExtractOp()
2417 unsigned LSB = countTrailingZeros(And_imm); in tryV6T2BitfieldExtractOp() local
2419 if (isInt32Immediate(N->getOperand(1), Srl_imm) && Srl_imm == LSB) { in tryV6T2BitfieldExtractOp()
[all …]
|
| /external/boringssl/src/crypto/cipher_extra/test/ |
| D | aes_128_gcm_tests.txt | 509 # 192 bytes plaintext, iv is chosen so that initial counter LSB is 0xFF
517 # 288 bytes plaintext, iv is chosen so that initial counter LSB is 0xFF
|
| /external/u-boot/arch/arm/dts/ |
| D | exynos5420-peach-pit.dts | 111 * NOF=40LSB for HBR CDR setting
118 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 179 int LSB = (BitWidth - ImmR) % BitWidth; in printInst() local
183 << ", #" << LSB << ", #" << Width; in printInst()
189 int LSB = (BitWidth - ImmR) % BitWidth; in printInst() local
193 << getRegisterName(Op2.getReg()) << ", #" << LSB << ", #" << Width; in printInst()
198 int LSB = ImmR; in printInst() local
203 << ", #" << LSB << ", #" << Width; in printInst()
|
| /external/u-boot/doc/device-tree-bindings/clock/ |
| D | st,stm32-rcc.txt | 39 Where bit_offset is the bit offset within the register (LSB is 0, MSB is 31).
|