| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsOptionRecord.h | 67 const MCRegisterClass *GPR32RegClass;
68 const MCRegisterClass *GPR64RegClass;
69 const MCRegisterClass *FGR32RegClass;
70 const MCRegisterClass *FGR64RegClass;
71 const MCRegisterClass *AFGR64RegClass;
72 const MCRegisterClass *MSA128BRegClass;
73 const MCRegisterClass *COP0RegClass;
74 const MCRegisterClass *COP2RegClass;
75 const MCRegisterClass *COP3RegClass;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsOptionRecord.h | 64 const MCRegisterClass *GPR32RegClass;
65 const MCRegisterClass *GPR64RegClass;
66 const MCRegisterClass *FGR32RegClass;
67 const MCRegisterClass *FGR64RegClass;
68 const MCRegisterClass *AFGR64RegClass;
69 const MCRegisterClass *MSA128BRegClass;
70 const MCRegisterClass *COP0RegClass;
71 const MCRegisterClass *COP2RegClass;
72 const MCRegisterClass *COP3RegClass;
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| /external/capstone/ |
| D | MCRegisterInfo.h | 32 typedef struct MCRegisterClass { struct
42 } MCRegisterClass; argument
82 MCRegisterClass *Classes; // Pointer to the regclass array
98 MCRegisterClass *C, unsigned NC,
108 …erInfo_getMatchingSuperReg(MCRegisterInfo *RI, unsigned Reg, unsigned SubIdx, MCRegisterClass *RC);
112 MCRegisterClass* MCRegisterInfo_getRegClass(MCRegisterInfo *RI, unsigned i);
114 bool MCRegisterClass_contains(MCRegisterClass *c, unsigned Reg);
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| D | MCRegisterInfo.c | 31 MCRegisterClass *C, unsigned NC, in MCRegisterInfo_InitMCRegisterInfo()
86 …terInfo_getMatchingSuperReg(MCRegisterInfo *RI, unsigned Reg, unsigned SubIdx, MCRegisterClass *RC) in MCRegisterInfo_getMatchingSuperReg()
126 MCRegisterClass* MCRegisterInfo_getRegClass(MCRegisterInfo *RI, unsigned i) in MCRegisterInfo_getRegClass()
134 bool MCRegisterClass_contains(MCRegisterClass *c, unsigned Reg) in MCRegisterClass_contains()
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCRegisterInfo.h | 25 class MCRegisterClass {
39 MCRegisterClass(unsigned id, const char *name, in MCRegisterClass() function
138 typedef const MCRegisterClass *regclass_iterator;
143 const MCRegisterClass *Classes; // Pointer to the regclass array
155 const MCRegisterClass *C, unsigned NC) { in InitMCRegisterInfo()
299 const MCRegisterClass getRegClass(unsigned i) const { in getRegClass()
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| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 30 class MCRegisterClass {
137 typedef const MCRegisterClass *regclass_iterator;
159 const MCRegisterClass *Classes; // Pointer to the regclass array
247 const MCRegisterClass *C, unsigned NC, in InitMCRegisterInfo()
348 const MCRegisterClass *RC) const;
417 const MCRegisterClass& getRegClass(unsigned i) const { in getRegClass()
422 const char *getRegClassName(const MCRegisterClass *Class) const { in getRegClassName()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 33 class MCRegisterClass {
137 using regclass_iterator = const MCRegisterClass *;
160 const MCRegisterClass *Classes; // Pointer to the regclass array
247 const MCRegisterClass *C, unsigned NC, in InitMCRegisterInfo()
358 const MCRegisterClass *RC) const;
439 const MCRegisterClass& getRegClass(unsigned i) const { in getRegClass()
444 const char *getRegClassName(const MCRegisterClass *Class) const { in getRegClassName()
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| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | SIMCCodeEmitter.cpp | 214 const MCRegisterClass &RC = MRI.getRegClass(RCID); in encodeInstruction()
284 const MCRegisterClass &RC = MRI.getRegClass(RCID); in getMachineOpValue()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Utils/ |
| D | AMDGPUBaseInfo.h | 33 class MCRegisterClass; variable
387 unsigned getRegBitWidth(const MCRegisterClass &RC);
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| D | AMDGPUBaseInfo.cpp | 675 const MCRegisterClass SGPRClass = TRI->getRegClass(AMDGPU::SReg_32RegClassID); in isSGPR()
819 unsigned getRegBitWidth(const MCRegisterClass &RC) { in getRegBitWidth()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/ |
| D | RegisterAliasing.h | 45 const llvm::MCRegisterClass &RegClass);
|
| D | RegisterAliasing.cpp | 34 const llvm::MCRegisterClass &RegClass) in RegisterAliasingTracker()
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 41 const MCRegisterClass *MC;
47 TargetRegisterClass(const MCRegisterClass *MC, const EVT *vts, in TargetRegisterClass()
|
| /external/capstone/arch/XCore/ |
| D | XCoreGenRegisterInfo.inc | 105 static MCRegisterClass XCoreMCRegisterClasses[] = {
|
| /external/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 19 const MCRegisterClass *RC) const { in getMatchingSuperReg()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 14 class MCRegisterClass;
15 extern MCRegisterClass X86MCRegisterClasses[];
1130 MCRegisterClass X86MCRegisterClasses[] = {
1131 MCRegisterClass(X86::GR8RegClassID, "GR8", 1, 1, 1, 1, GR8, GR8 + 20, GR8Bits, sizeof(GR8Bits)),
1132 …MCRegisterClass(X86::GR64RegClassID, "GR64", 8, 8, 1, 1, GR64, GR64 + 17, GR64Bits, sizeof(GR64Bit…
1133 …MCRegisterClass(X86::GR16RegClassID, "GR16", 2, 2, 1, 1, GR16, GR16 + 16, GR16Bits, sizeof(GR16Bit…
1134 …MCRegisterClass(X86::GR32RegClassID, "GR32", 4, 4, 1, 1, GR32, GR32 + 16, GR32Bits, sizeof(GR32Bit…
1135 …MCRegisterClass(X86::FR32RegClassID, "FR32", 4, 4, 1, 1, FR32, FR32 + 16, FR32Bits, sizeof(FR32Bit…
1136 …MCRegisterClass(X86::GR64_with_sub_8bitRegClassID, "GR64_with_sub_8bit", 8, 8, 1, 1, GR64_with_sub…
1137 …MCRegisterClass(X86::FR64RegClassID, "FR64", 8, 8, 1, 1, FR64, FR64 + 16, FR64Bits, sizeof(FR64Bit…
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 24 const MCRegisterClass *RC) const { in getMatchingSuperReg()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 401 const MCRegisterClass &GR32RC = MRI.getRegClass(X86::GR32RegClassID); in clearsSuperRegisters()
402 const MCRegisterClass &VR128XRC = MRI.getRegClass(X86::VR128XRegClassID); in clearsSuperRegisters()
403 const MCRegisterClass &VR256XRC = MRI.getRegClass(X86::VR256XRegClassID); in clearsSuperRegisters()
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| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-mca/ |
| D | RegisterFile.cpp | 83 const MCRegisterClass &RC = MRI.getRegClass(RCE.RegisterClassID); in addRegisterFile()
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenRegisterInfo.inc | 15 class MCRegisterClass;
16 extern const MCRegisterClass ARMMCRegisterClasses[];
2634 extern const MCRegisterClass ARMMCRegisterClasses[] = {
3441 extern const MCRegisterClass ARMMCRegisterClasses[];
5235 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::HPRRegClassID];
5253 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::SPRRegClassID];
5271 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRRegClassID];
5289 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRwithAPSRRegClassID];
5307 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::GPRnopcRegClassID];
5325 const MCRegisterClass &MCR = ARMMCRegisterClasses[ARM::rGPRRegClassID];
[all …]
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| /external/llvm/lib/Target/AMDGPU/InstPrinter/ |
| D | AMDGPUInstPrinter.cpp | 388 const MCRegisterClass &ImmRC = MRI.getRegClass(RCID); in printOperand()
409 const MCRegisterClass &ImmRC = MRI.getRegClass(Desc.OpInfo[OpNo].RegClass); in printOperand()
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| /external/capstone/arch/Sparc/ |
| D | SparcGenRegisterInfo.inc | 451 static MCRegisterClass SparcMCRegisterClasses[] = {
|
| /external/capstone/arch/SystemZ/ |
| D | SystemZGenRegisterInfo.inc | 435 static MCRegisterClass SystemZMCRegisterClasses[] = {
|
| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 63 const MCRegisterClass *MC;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 52 const MCRegisterClass *MC;
|