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Searched refs:MI_BATCH_BUFFER_END (Results 1 – 13 of 13) sorted by relevance

/external/libdrm/intel/tests/
Dgen7-2d-copy.batch-ref.txt13 0x12300030: 0x05000000: MI_BATCH_BUFFER_END
Dgen7-3d.batch-ref.txt212 0x1230034c: 0x05000000: MI_BATCH_BUFFER_END
Dgm45-3d.batch-ref.txt488 0x1230079c: 0x05000000: MI_BATCH_BUFFER_END
Dgen4-3d.batch-ref.txt488 0x1230079c: 0x05000000: MI_BATCH_BUFFER_END
Dgen5-3d.batch-ref.txt512 0x123007fc: 0x05000000: MI_BATCH_BUFFER_END
Dgen6-3d.batch-ref.txt990 0x12300f74: 0x05000000: MI_BATCH_BUFFER_END
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_reg.h34 #define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23) macro
Dintel_batchbuffer.c166 intel_batchbuffer_emit_dword(intel, MI_BATCH_BUFFER_END); in _intel_batchbuffer_flush()
/external/mesa3d/src/intel/vulkan/
DgenX_state.c172 anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe); in genX()
/external/mesa3d/src/gallium/drivers/i915/
Di915_reg.h923 #define MI_BATCH_BUFFER_END (0xa<<23) macro
/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_defines.h1423 #define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23) macro
Dintel_batchbuffer.c781 *brw->batch.map_next++ = MI_BATCH_BUFFER_END; in brw_finish_batch()
Dintel_screen.c1928 *batch++ = MI_BATCH_BUFFER_END; in intel_detect_pipelined_register()