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1 /**************************************************************************
2  *
3  * Copyright 2003 VMware, Inc.
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  **************************************************************************/
27 
28 
29 #ifndef I915_REG_H
30 #define I915_REG_H
31 
32 
33 #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value)
34 
35 #define CMD_3D (0x3<<29)
36 
37 #define PRIM3D_INLINE		(CMD_3D | (0x1f<<24))
38 #define PRIM3D_TRILIST		(0x0<<18)
39 #define PRIM3D_TRISTRIP 	(0x1<<18)
40 #define PRIM3D_TRISTRIP_RVRSE	(0x2<<18)
41 #define PRIM3D_TRIFAN		(0x3<<18)
42 #define PRIM3D_POLY		(0x4<<18)
43 #define PRIM3D_LINELIST 	(0x5<<18)
44 #define PRIM3D_LINESTRIP	(0x6<<18)
45 #define PRIM3D_RECTLIST 	(0x7<<18)
46 #define PRIM3D_POINTLIST	(0x8<<18)
47 #define PRIM3D_DIB		(0x9<<18)
48 #define PRIM3D_CLEAR_RECT	(0xa<<18)
49 #define PRIM3D_ZONE_INIT	(0xd<<18)
50 #define PRIM3D_MASK		(0x1f<<18)
51 
52 /* p137 */
53 #define _3DSTATE_AA_CMD			(CMD_3D | (0x06<<24))
54 #define AA_LINE_ECAAR_WIDTH_ENABLE	(1<<16)
55 #define AA_LINE_ECAAR_WIDTH_0_5 	0
56 #define AA_LINE_ECAAR_WIDTH_1_0		(1<<14)
57 #define AA_LINE_ECAAR_WIDTH_2_0 	(2<<14)
58 #define AA_LINE_ECAAR_WIDTH_4_0 	(3<<14)
59 #define AA_LINE_REGION_WIDTH_ENABLE	(1<<8)
60 #define AA_LINE_REGION_WIDTH_0_5	0
61 #define AA_LINE_REGION_WIDTH_1_0	(1<<6)
62 #define AA_LINE_REGION_WIDTH_2_0	(2<<6)
63 #define AA_LINE_REGION_WIDTH_4_0	(3<<6)
64 
65 /* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/
66 #define _3DSTATE_BACKFACE_STENCIL_OPS    (CMD_3D | (0x8<<24))
67 #define BFO_ENABLE_STENCIL_REF          (1<<23)
68 #define BFO_STENCIL_REF_SHIFT           15
69 #define BFO_STENCIL_REF_MASK            (0xff<<15)
70 #define BFO_ENABLE_STENCIL_FUNCS        (1<<14)
71 #define BFO_STENCIL_TEST_SHIFT          11
72 #define BFO_STENCIL_TEST_MASK           (0x7<<11)
73 #define BFO_STENCIL_FAIL_SHIFT          8
74 #define BFO_STENCIL_FAIL_MASK           (0x7<<8)
75 #define BFO_STENCIL_PASS_Z_FAIL_SHIFT   5
76 #define BFO_STENCIL_PASS_Z_FAIL_MASK    (0x7<<5)
77 #define BFO_STENCIL_PASS_Z_PASS_SHIFT   2
78 #define BFO_STENCIL_PASS_Z_PASS_MASK    (0x7<<2)
79 #define BFO_ENABLE_STENCIL_TWO_SIDE     (1<<1)
80 #define BFO_STENCIL_TWO_SIDE            (1<<0)
81 
82 
83 /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */
84 #define _3DSTATE_BACKFACE_STENCIL_MASKS    (CMD_3D | (0x9<<24))
85 #define BFM_ENABLE_STENCIL_TEST_MASK      (1<<17)
86 #define BFM_ENABLE_STENCIL_WRITE_MASK     (1<<16)
87 #define BFM_STENCIL_TEST_MASK_SHIFT       8
88 #define BFM_STENCIL_TEST_MASK_MASK        (0xff<<8)
89 #define BFM_STENCIL_WRITE_MASK_SHIFT      0
90 #define BFM_STENCIL_WRITE_MASK_MASK       (0xff<<0)
91 
92 
93 
94 /* 3DSTATE_BIN_CONTROL p141 */
95 
96 /* p143 */
97 #define _3DSTATE_BUF_INFO_CMD	(CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
98 /* Dword 1 */
99 #define BUF_3D_ID_COLOR_BACK	(0x3<<24)
100 #define BUF_3D_ID_DEPTH 	(0x7<<24)
101 #define BUF_3D_USE_FENCE	(1<<23)
102 #define BUF_3D_TILED_SURFACE	(1<<22)
103 #define BUF_3D_TILE_WALK_X	0
104 #define BUF_3D_TILE_WALK_Y	(1<<21)
105 #define BUF_3D_PITCH(x)         (((x)/4)<<2)
106 /* Dword 2 */
107 #define BUF_3D_ADDR(x)		((x) & ~0x3)
108 
109 
110 /* 3DSTATE_CHROMA_KEY */
111 
112 /* 3DSTATE_CLEAR_PARAMETERS, p150 */
113 #define _3DSTATE_CLEAR_PARAMETERS	(CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
114 /* Dword 1 */
115 #define CLEARPARAM_CLEAR_RECT		(1 << 16)
116 #define CLEARPARAM_ZONE_INIT		(0 << 16)
117 #define CLEARPARAM_WRITE_COLOR		(1 << 2)
118 #define CLEARPARAM_WRITE_DEPTH		(1 << 1)
119 #define CLEARPARAM_WRITE_STENCIL	(1 << 0)
120 
121 /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
122 #define _3DSTATE_CONST_BLEND_COLOR_CMD	(CMD_3D | (0x1d<<24) | (0x88<<16))
123 
124 
125 
126 /* 3DSTATE_COORD_SET_BINDINGS, p154 */
127 #define _3DSTATE_COORD_SET_BINDINGS      (CMD_3D | (0x16<<24))
128 #define CSB_TCB(iunit, eunit)           ((eunit)<<(iunit*3))
129 
130 /* p156 */
131 #define _3DSTATE_DFLT_DIFFUSE_CMD	(CMD_3D | (0x1d<<24) | (0x99<<16))
132 
133 /* p157 */
134 #define _3DSTATE_DFLT_SPEC_CMD		(CMD_3D | (0x1d<<24) | (0x9a<<16))
135 
136 /* p158 */
137 #define _3DSTATE_DFLT_Z_CMD		(CMD_3D | (0x1d<<24) | (0x98<<16))
138 
139 
140 /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */
141 #define _3DSTATE_DEPTH_OFFSET_SCALE       (CMD_3D | (0x1d<<24) | (0x97<<16))
142 /* scale in dword 1 */
143 
144 
145 /* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */
146 #define _3DSTATE_DEPTH_SUBRECT_DISABLE    (CMD_3D | (0x1c<<24) | (0x11<<19) | 0x2)
147 
148 /* p161 */
149 #define _3DSTATE_DST_BUF_VARS_CMD	(CMD_3D | (0x1d<<24) | (0x85<<16))
150 /* Dword 1 */
151 #define CLASSIC_EARLY_DEPTH             (1<<31)
152 #define TEX_DEFAULT_COLOR_OGL           (0<<30)
153 #define TEX_DEFAULT_COLOR_D3D           (1<<30)
154 #define ZR_EARLY_DEPTH                  (1<<29)
155 #define LOD_PRECLAMP_OGL                (1<<28)
156 #define LOD_PRECLAMP_D3D                (0<<28)
157 #define DITHER_FULL_ALWAYS              (0<<26)
158 #define DITHER_FULL_ON_FB_BLEND         (1<<26)
159 #define DITHER_CLAMPED_ALWAYS           (2<<26)
160 #define LINEAR_GAMMA_BLEND_32BPP        (1<<25)
161 #define DEBUG_DISABLE_ENH_DITHER        (1<<24)
162 #define DSTORG_HORT_BIAS(x)		((x)<<20)
163 #define DSTORG_VERT_BIAS(x)		((x)<<16)
164 #define COLOR_4_2_2_CHNL_WRT_ALL	0
165 #define COLOR_4_2_2_CHNL_WRT_Y		(1<<12)
166 #define COLOR_4_2_2_CHNL_WRT_CR		(2<<12)
167 #define COLOR_4_2_2_CHNL_WRT_CB		(3<<12)
168 #define COLOR_4_2_2_CHNL_WRT_CRCB	(4<<12)
169 #define COLOR_BUF_8BIT			0
170 #define COLOR_BUF_RGB555 		(1<<8)
171 #define COLOR_BUF_RGB565 		(2<<8)
172 #define COLOR_BUF_ARGB8888		(3<<8)
173 #define COLOR_BUF_YCRCB_SWAP		(4<<8)
174 #define COLOR_BUF_YCRCB_NORMAL		(5<<8)
175 #define COLOR_BUF_YCRCB_SWAPUV		(6<<8)
176 #define COLOR_BUF_YCRCB_SWAPUVY		(7<<8)
177 #define COLOR_BUF_ARGB4444		(8<<8)
178 #define COLOR_BUF_ARGB1555		(9<<8)
179 #define COLOR_BUF_ARGB2101010		(10<<8)
180 #define DEPTH_FRMT_16_FIXED		0
181 #define DEPTH_FRMT_16_FLOAT		(1<<2)
182 #define DEPTH_FRMT_24_FIXED_8_OTHER	(2<<2)
183 #define VERT_LINE_STRIDE_1		(1<<1)
184 #define VERT_LINE_STRIDE_0		(0<<1)
185 #define VERT_LINE_STRIDE_OFS_1		1
186 #define VERT_LINE_STRIDE_OFS_0		0
187 
188 /* p166 */
189 #define _3DSTATE_DRAW_RECT_CMD		(CMD_3D|(0x1d<<24)|(0x80<<16)|3)
190 /* Dword 1 */
191 #define DRAW_RECT_DIS_DEPTH_OFS 	(1<<30)
192 #define DRAW_DITHER_OFS_X(x)		((x)<<26)
193 #define DRAW_DITHER_OFS_Y(x)		((x)<<24)
194 /* Dword 2 */
195 #define DRAW_YMIN(x)			((x)<<16)
196 #define DRAW_XMIN(x)			(x)
197 /* Dword 3 */
198 #define DRAW_YMAX(x)			((x)<<16)
199 #define DRAW_XMAX(x)			(x)
200 /* Dword 4 */
201 #define DRAW_YORG(x)			((x)<<16)
202 #define DRAW_XORG(x)			(x)
203 
204 
205 /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */
206 
207 /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */
208 
209 
210 /* _3DSTATE_FOG_COLOR, p173 */
211 #define _3DSTATE_FOG_COLOR_CMD		(CMD_3D|(0x15<<24))
212 #define FOG_COLOR_RED(x)		((x)<<16)
213 #define FOG_COLOR_GREEN(x)		((x)<<8)
214 #define FOG_COLOR_BLUE(x)		(x)
215 
216 /* _3DSTATE_FOG_MODE, p174 */
217 #define _3DSTATE_FOG_MODE_CMD		(CMD_3D|(0x1d<<24)|(0x89<<16)|2)
218 /* Dword 1 */
219 #define FMC1_FOGFUNC_MODIFY_ENABLE	(1<<31)
220 #define FMC1_FOGFUNC_VERTEX		(0<<28)
221 #define FMC1_FOGFUNC_PIXEL_EXP		(1<<28)
222 #define FMC1_FOGFUNC_PIXEL_EXP2		(2<<28)
223 #define FMC1_FOGFUNC_PIXEL_LINEAR	(3<<28)
224 #define FMC1_FOGFUNC_MASK		(3<<28)
225 #define FMC1_FOGINDEX_MODIFY_ENABLE     (1<<27)
226 #define FMC1_FOGINDEX_Z		        (0<<25)
227 #define FMC1_FOGINDEX_W   		(1<<25)
228 #define FMC1_C1_C2_MODIFY_ENABLE	(1<<24)
229 #define FMC1_DENSITY_MODIFY_ENABLE	(1<<23)
230 #define FMC1_C1_ONE      	        (1<<13)
231 #define FMC1_C1_MASK		        (0xffff<<4)
232 /* Dword 2 */
233 #define FMC2_C2_ONE		        (1<<16)
234 /* Dword 3 */
235 #define FMC3_D_ONE      		(1<<16)
236 
237 
238 
239 /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */
240 #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD	(CMD_3D|(0x0b<<24))
241 #define IAB_MODIFY_ENABLE	        (1<<23)
242 #define IAB_ENABLE       	        (1<<22)
243 #define IAB_MODIFY_FUNC         	(1<<21)
244 #define IAB_FUNC_SHIFT          	16
245 #define IAB_MODIFY_SRC_FACTOR   	(1<<11)
246 #define IAB_SRC_FACTOR_SHIFT		6
247 #define IAB_SRC_FACTOR_MASK		(BLENDFACT_MASK<<6)
248 #define IAB_MODIFY_DST_FACTOR	        (1<<5)
249 #define IAB_DST_FACTOR_SHIFT		0
250 #define IAB_DST_FACTOR_MASK		(BLENDFACT_MASK<<0)
251 
252 
253 #define BLENDFUNC_ADD			0x0
254 #define BLENDFUNC_SUBTRACT		0x1
255 #define BLENDFUNC_REVERSE_SUBTRACT	0x2
256 #define BLENDFUNC_MIN			0x3
257 #define BLENDFUNC_MAX			0x4
258 #define BLENDFUNC_MASK			0x7
259 
260 /* 3DSTATE_LOAD_INDIRECT, p180 */
261 
262 #define _3DSTATE_LOAD_INDIRECT	        (CMD_3D|(0x1d<<24)|(0x7<<16))
263 #define LI0_STATE_STATIC_INDIRECT       (0x01<<8)
264 #define LI0_STATE_DYNAMIC_INDIRECT      (0x02<<8)
265 #define LI0_STATE_SAMPLER               (0x04<<8)
266 #define LI0_STATE_MAP                   (0x08<<8)
267 #define LI0_STATE_PROGRAM               (0x10<<8)
268 #define LI0_STATE_CONSTANTS             (0x20<<8)
269 
270 #define SIS0_BUFFER_ADDRESS(x)          ((x)&~0x3)
271 #define SIS0_FORCE_LOAD                 (1<<1)
272 #define SIS0_BUFFER_VALID               (1<<0)
273 #define SIS1_BUFFER_LENGTH(x)           ((x)&0xff)
274 
275 #define DIS0_BUFFER_ADDRESS(x)          ((x)&~0x3)
276 #define DIS0_BUFFER_RESET               (1<<1)
277 #define DIS0_BUFFER_VALID               (1<<0)
278 
279 #define SSB0_BUFFER_ADDRESS(x)          ((x)&~0x3)
280 #define SSB0_FORCE_LOAD                 (1<<1)
281 #define SSB0_BUFFER_VALID               (1<<0)
282 #define SSB1_BUFFER_LENGTH(x)           ((x)&0xff)
283 
284 #define MSB0_BUFFER_ADDRESS(x)          ((x)&~0x3)
285 #define MSB0_FORCE_LOAD                 (1<<1)
286 #define MSB0_BUFFER_VALID               (1<<0)
287 #define MSB1_BUFFER_LENGTH(x)           ((x)&0xff)
288 
289 #define PSP0_BUFFER_ADDRESS(x)          ((x)&~0x3)
290 #define PSP0_FORCE_LOAD                 (1<<1)
291 #define PSP0_BUFFER_VALID               (1<<0)
292 #define PSP1_BUFFER_LENGTH(x)           ((x)&0xff)
293 
294 #define PSC0_BUFFER_ADDRESS(x)          ((x)&~0x3)
295 #define PSC0_FORCE_LOAD                 (1<<1)
296 #define PSC0_BUFFER_VALID               (1<<0)
297 #define PSC1_BUFFER_LENGTH(x)           ((x)&0xff)
298 
299 
300 
301 
302 
303 /* _3DSTATE_RASTERIZATION_RULES */
304 #define _3DSTATE_RASTER_RULES_CMD	(CMD_3D|(0x07<<24))
305 #define ENABLE_POINT_RASTER_RULE	(1<<15)
306 #define OGL_POINT_RASTER_RULE		(1<<13)
307 #define ENABLE_TEXKILL_3D_4D            (1<<10)
308 #define TEXKILL_3D                      (0<<9)
309 #define TEXKILL_4D                      (1<<9)
310 #define ENABLE_LINE_STRIP_PROVOKE_VRTX	(1<<8)
311 #define ENABLE_TRI_FAN_PROVOKE_VRTX	(1<<5)
312 #define LINE_STRIP_PROVOKE_VRTX(x)	((x)<<6)
313 #define TRI_FAN_PROVOKE_VRTX(x) 	((x)<<3)
314 
315 /* _3DSTATE_SCISSOR_ENABLE, p256 */
316 #define _3DSTATE_SCISSOR_ENABLE_CMD	(CMD_3D|(0x1c<<24)|(0x10<<19))
317 #define ENABLE_SCISSOR_RECT		((1<<1) | 1)
318 #define DISABLE_SCISSOR_RECT		(1<<1)
319 
320 /* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */
321 #define _3DSTATE_SCISSOR_RECT_0_CMD	(CMD_3D|(0x1d<<24)|(0x81<<16)|1)
322 /* Dword 1 */
323 #define SCISSOR_RECT_0_YMIN(x)		((x)<<16)
324 #define SCISSOR_RECT_0_XMIN(x)		(x)
325 /* Dword 2 */
326 #define SCISSOR_RECT_0_YMAX(x)		((x)<<16)
327 #define SCISSOR_RECT_0_XMAX(x)		(x)
328 
329 /* p189 */
330 #define _3DSTATE_LOAD_STATE_IMMEDIATE_1   ((0x3<<29)|(0x1d<<24)|(0x04<<16))
331 #define I1_LOAD_S(n)                      (1<<(4+n))
332 
333 #define S0_VB_OFFSET_MASK              0xffffffc
334 #define S0_AUTO_CACHE_INV_DISABLE      (1<<0)
335 
336 #define S1_VERTEX_WIDTH_SHIFT          24
337 #define S1_VERTEX_WIDTH_MASK           (0x3f<<24)
338 #define S1_VERTEX_PITCH_SHIFT          16
339 #define S1_VERTEX_PITCH_MASK           (0x3f<<16)
340 
341 #define TEXCOORDFMT_2D                 0x0
342 #define TEXCOORDFMT_3D                 0x1
343 #define TEXCOORDFMT_4D                 0x2
344 #define TEXCOORDFMT_1D                 0x3
345 #define TEXCOORDFMT_2D_16              0x4
346 #define TEXCOORDFMT_4D_16              0x5
347 #define TEXCOORDFMT_NOT_PRESENT        0xf
348 #define S2_TEXCOORD_FMT0_MASK            0xf
349 #define S2_TEXCOORD_FMT1_SHIFT           4
350 #define S2_TEXCOORD_FMT(unit, type)    ((type)<<(unit*4))
351 #define S2_TEXCOORD_NONE               (~0)
352 
353 /* S3 not interesting */
354 
355 #define S4_POINT_WIDTH_SHIFT           23
356 #define S4_POINT_WIDTH_MASK            (0x1ff<<23)
357 #define S4_LINE_WIDTH_SHIFT            19
358 #define S4_LINE_WIDTH_ONE              (0x2<<19)
359 #define S4_LINE_WIDTH_MASK             (0xf<<19)
360 #define S4_FLATSHADE_ALPHA             (1<<18)
361 #define S4_FLATSHADE_FOG               (1<<17)
362 #define S4_FLATSHADE_SPECULAR          (1<<16)
363 #define S4_FLATSHADE_COLOR             (1<<15)
364 #define S4_CULLMODE_BOTH	       (0<<13)
365 #define S4_CULLMODE_NONE	       (1<<13)
366 #define S4_CULLMODE_CW		       (2<<13)
367 #define S4_CULLMODE_CCW		       (3<<13)
368 #define S4_CULLMODE_MASK	       (3<<13)
369 #define S4_VFMT_POINT_WIDTH            (1<<12)
370 #define S4_VFMT_SPEC_FOG               (1<<11)
371 #define S4_VFMT_COLOR                  (1<<10)
372 #define S4_VFMT_DEPTH_OFFSET           (1<<9)
373 #define S4_VFMT_XYZ     	       (1<<6)
374 #define S4_VFMT_XYZW     	       (2<<6)
375 #define S4_VFMT_XY     		       (3<<6)
376 #define S4_VFMT_XYW     	       (4<<6)
377 #define S4_VFMT_XYZW_MASK              (7<<6)
378 #define S4_FORCE_DEFAULT_DIFFUSE       (1<<5)
379 #define S4_FORCE_DEFAULT_SPECULAR      (1<<4)
380 #define S4_LOCAL_DEPTH_OFFSET_ENABLE   (1<<3)
381 #define S4_VFMT_FOG_PARAM              (1<<2)
382 #define S4_SPRITE_POINT_ENABLE         (1<<1)
383 #define S4_LINE_ANTIALIAS_ENABLE       (1<<0)
384 
385 #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH   | 	\
386 		      S4_VFMT_SPEC_FOG      |	\
387 		      S4_VFMT_COLOR         |	\
388 		      S4_VFMT_DEPTH_OFFSET  |	\
389 		      S4_VFMT_XYZW_MASK     |	\
390 		      S4_VFMT_FOG_PARAM)
391 
392 
393 #define S5_WRITEDISABLE_ALPHA          (1<<31)
394 #define S5_WRITEDISABLE_RED            (1<<30)
395 #define S5_WRITEDISABLE_GREEN          (1<<29)
396 #define S5_WRITEDISABLE_BLUE           (1<<28)
397 #define S5_WRITEDISABLE_MASK           (0xf<<28)
398 #define S5_FORCE_DEFAULT_POINT_SIZE    (1<<27)
399 #define S5_LAST_PIXEL_ENABLE           (1<<26)
400 #define S5_GLOBAL_DEPTH_OFFSET_ENABLE  (1<<25)
401 #define S5_FOG_ENABLE                  (1<<24)
402 #define S5_STENCIL_REF_SHIFT           16
403 #define S5_STENCIL_REF_MASK            (0xff<<16)
404 #define S5_STENCIL_TEST_FUNC_SHIFT     13
405 #define S5_STENCIL_TEST_FUNC_MASK      (0x7<<13)
406 #define S5_STENCIL_FAIL_SHIFT          10
407 #define S5_STENCIL_FAIL_MASK           (0x7<<10)
408 #define S5_STENCIL_PASS_Z_FAIL_SHIFT   7
409 #define S5_STENCIL_PASS_Z_FAIL_MASK    (0x7<<7)
410 #define S5_STENCIL_PASS_Z_PASS_SHIFT   4
411 #define S5_STENCIL_PASS_Z_PASS_MASK    (0x7<<4)
412 #define S5_STENCIL_WRITE_ENABLE        (1<<3)
413 #define S5_STENCIL_TEST_ENABLE         (1<<2)
414 #define S5_COLOR_DITHER_ENABLE         (1<<1)
415 #define S5_LOGICOP_ENABLE              (1<<0)
416 
417 
418 #define S6_ALPHA_TEST_ENABLE           (1<<31)
419 #define S6_ALPHA_TEST_FUNC_SHIFT       28
420 #define S6_ALPHA_TEST_FUNC_MASK        (0x7<<28)
421 #define S6_ALPHA_REF_SHIFT             20
422 #define S6_ALPHA_REF_MASK              (0xff<<20)
423 #define S6_DEPTH_TEST_ENABLE           (1<<19)
424 #define S6_DEPTH_TEST_FUNC_SHIFT       16
425 #define S6_DEPTH_TEST_FUNC_MASK        (0x7<<16)
426 #define S6_CBUF_BLEND_ENABLE           (1<<15)
427 #define S6_CBUF_BLEND_FUNC_SHIFT       12
428 #define S6_CBUF_BLEND_FUNC_MASK        (0x7<<12)
429 #define S6_CBUF_SRC_BLEND_FACT_SHIFT   8
430 #define S6_CBUF_SRC_BLEND_FACT_MASK    (0xf<<8)
431 #define S6_CBUF_DST_BLEND_FACT_SHIFT   4
432 #define S6_CBUF_DST_BLEND_FACT_MASK    (0xf<<4)
433 #define S6_DEPTH_WRITE_ENABLE          (1<<3)
434 #define S6_COLOR_WRITE_ENABLE          (1<<2)
435 #define S6_TRISTRIP_PV_SHIFT           0
436 #define S6_TRISTRIP_PV_MASK            (0x3<<0)
437 
438 #define S7_DEPTH_OFFSET_CONST_MASK     ~0
439 
440 
441 
442 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
443 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
444 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
445 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
446 
447 
448 
449 
450 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */
451 
452 /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
453 #define _3DSTATE_MAP_PALETTE_LOAD_32    (CMD_3D|(0x1d<<24)|(0x8f<<16))
454 /* subsequent dwords up to length (max 16) are ARGB8888 color values */
455 
456 /* _3DSTATE_MODES_4, p218 */
457 #define _3DSTATE_MODES_4_CMD		(CMD_3D|(0x0d<<24))
458 #define ENABLE_LOGIC_OP_FUNC		(1<<23)
459 #define LOGIC_OP_FUNC(x)		((x)<<18)
460 #define LOGICOP_MASK			(0xf<<18)
461 #define MODE4_ENABLE_STENCIL_TEST_MASK	((1<<17)|(0xff00))
462 #define ENABLE_STENCIL_TEST_MASK	(1<<17)
463 #define STENCIL_TEST_MASK(x)		(((x)&0xff)<<8)
464 #define MODE4_ENABLE_STENCIL_WRITE_MASK	((1<<16)|(0x00ff))
465 #define ENABLE_STENCIL_WRITE_MASK	(1<<16)
466 #define STENCIL_WRITE_MASK(x)		((x)&0xff)
467 
468 /* _3DSTATE_MODES_5, p220 */
469 #define _3DSTATE_MODES_5_CMD		(CMD_3D|(0x0c<<24))
470 #define PIPELINE_FLUSH_RENDER_CACHE	(1<<18)
471 #define PIPELINE_FLUSH_TEXTURE_CACHE	(1<<16)
472 
473 
474 /* p221 */
475 #define _3DSTATE_PIXEL_SHADER_CONSTANTS  (CMD_3D|(0x1d<<24)|(0x6<<16))
476 #define PS1_REG(n)                      (1<<(n))
477 #define PS2_CONST_X(n)                  (n)
478 #define PS3_CONST_Y(n)                  (n)
479 #define PS4_CONST_Z(n)                  (n)
480 #define PS5_CONST_W(n)                  (n)
481 
482 /* p222 */
483 
484 
485 #define I915_MAX_TEX_INDIRECT 4
486 #define I915_MAX_TEX_INSN     32
487 #define I915_MAX_ALU_INSN     64
488 #define I915_MAX_DECL_INSN    27
489 #define I915_MAX_TEMPORARY    16
490 
491 
492 /* Each instruction is 3 dwords long, though most don't require all
493  * this space.  Maximum of 123 instructions.  Smaller maxes per insn
494  * type.
495  */
496 #define _3DSTATE_PIXEL_SHADER_PROGRAM    (CMD_3D|(0x1d<<24)|(0x5<<16))
497 
498 #define REG_TYPE_R                 0    /* temporary regs, no need to
499                                          * dcl, must be written before
500                                          * read -- Preserved between
501                                          * phases.
502                                          */
503 #define REG_TYPE_T                 1    /* Interpolated values, must be
504                                          * dcl'ed before use.
505                                          *
506                                          * 0..7: texture coord,
507                                          * 8: diffuse spec,
508                                          * 9: specular color,
509                                          * 10: fog parameter in w.
510                                          */
511 #define REG_TYPE_CONST             2    /* Restriction: only one const
512                                          * can be referenced per
513                                          * instruction, though it may be
514                                          * selected for multiple inputs.
515                                          * Constants not initialized
516                                          * default to zero.
517                                          */
518 #define REG_TYPE_S                 3    /* sampler */
519 #define REG_TYPE_OC                4    /* output color (rgba) */
520 #define REG_TYPE_OD                5    /* output depth (w), xyz are
521                                          * temporaries.  If not written,
522                                          * interpolated depth is used?
523                                          */
524 #define REG_TYPE_U                 6    /* unpreserved temporaries */
525 #define REG_TYPE_MASK              0x7
526 #define REG_NR_MASK                0xf
527 
528 
529 /* REG_TYPE_T:
530  */
531 #define T_TEX0     0
532 #define T_TEX1     1
533 #define T_TEX2     2
534 #define T_TEX3     3
535 #define T_TEX4     4
536 #define T_TEX5     5
537 #define T_TEX6     6
538 #define T_TEX7     7
539 #define T_DIFFUSE  8
540 #define T_SPECULAR 9
541 #define T_FOG_W    10           /* interpolated fog is in W coord */
542 
543 /* Arithmetic instructions */
544 
545 /* .replicate_swizzle == selection and replication of a particular
546  * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
547  */
548 #define A0_NOP    (0x0<<24)     /* no operation */
549 #define A0_ADD    (0x1<<24)     /* dst = src0 + src1 */
550 #define A0_MOV    (0x2<<24)     /* dst = src0 */
551 #define A0_MUL    (0x3<<24)     /* dst = src0 * src1 */
552 #define A0_MAD    (0x4<<24)     /* dst = src0 * src1 + src2 */
553 #define A0_DP2ADD (0x5<<24)     /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
554 #define A0_DP3    (0x6<<24)     /* dst.xyzw = src0.xyz dot src1.xyz */
555 #define A0_DP4    (0x7<<24)     /* dst.xyzw = src0.xyzw dot src1.xyzw */
556 #define A0_FRC    (0x8<<24)     /* dst = src0 - floor(src0) */
557 #define A0_RCP    (0x9<<24)     /* dst.xyzw = 1/(src0.replicate_swizzle) */
558 #define A0_RSQ    (0xa<<24)     /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
559 #define A0_EXP    (0xb<<24)     /* dst.xyzw = exp2(src0.replicate_swizzle) */
560 #define A0_LOG    (0xc<<24)     /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
561 #define A0_CMP    (0xd<<24)     /* dst = (src0 >= 0.0) ? src1 : src2 */
562 #define A0_MIN    (0xe<<24)     /* dst = (src0 < src1) ? src0 : src1 */
563 #define A0_MAX    (0xf<<24)     /* dst = (src0 >= src1) ? src0 : src1 */
564 #define A0_FLR    (0x10<<24)    /* dst = floor(src0) */
565 #define A0_MOD    (0x11<<24)    /* dst = src0 fmod 1.0 */
566 #define A0_TRC    (0x12<<24)    /* dst = int(src0) */
567 #define A0_SGE    (0x13<<24)    /* dst = src0 >= src1 ? 1.0 : 0.0 */
568 #define A0_SLT    (0x14<<24)    /* dst = src0 < src1 ? 1.0 : 0.0 */
569 #define A0_DEST_SATURATE                 (1<<22)
570 #define A0_DEST_TYPE_SHIFT                19
571 /* Allow: R, OC, OD, U */
572 #define A0_DEST_NR_SHIFT                 14
573 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
574 #define A0_DEST_CHANNEL_X                (1<<10)
575 #define A0_DEST_CHANNEL_Y                (2<<10)
576 #define A0_DEST_CHANNEL_Z                (4<<10)
577 #define A0_DEST_CHANNEL_W                (8<<10)
578 #define A0_DEST_CHANNEL_ALL              (0xf<<10)
579 #define A0_DEST_CHANNEL_SHIFT            10
580 #define A0_SRC0_TYPE_SHIFT               7
581 #define A0_SRC0_NR_SHIFT                 2
582 
583 #define A0_DEST_CHANNEL_XY              (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y)
584 #define A0_DEST_CHANNEL_XYZ             (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z)
585 
586 
587 #define SRC_X        0
588 #define SRC_Y        1
589 #define SRC_Z        2
590 #define SRC_W        3
591 #define SRC_ZERO     4
592 #define SRC_ONE      5
593 
594 #define A1_SRC0_CHANNEL_X_NEGATE         (1<<31)
595 #define A1_SRC0_CHANNEL_X_SHIFT          28
596 #define A1_SRC0_CHANNEL_Y_NEGATE         (1<<27)
597 #define A1_SRC0_CHANNEL_Y_SHIFT          24
598 #define A1_SRC0_CHANNEL_Z_NEGATE         (1<<23)
599 #define A1_SRC0_CHANNEL_Z_SHIFT          20
600 #define A1_SRC0_CHANNEL_W_NEGATE         (1<<19)
601 #define A1_SRC0_CHANNEL_W_SHIFT          16
602 #define A1_SRC1_TYPE_SHIFT               13
603 #define A1_SRC1_NR_SHIFT                 8
604 #define A1_SRC1_CHANNEL_X_NEGATE         (1<<7)
605 #define A1_SRC1_CHANNEL_X_SHIFT          4
606 #define A1_SRC1_CHANNEL_Y_NEGATE         (1<<3)
607 #define A1_SRC1_CHANNEL_Y_SHIFT          0
608 
609 #define A2_SRC1_CHANNEL_Z_NEGATE         (1<<31)
610 #define A2_SRC1_CHANNEL_Z_SHIFT          28
611 #define A2_SRC1_CHANNEL_W_NEGATE         (1<<27)
612 #define A2_SRC1_CHANNEL_W_SHIFT          24
613 #define A2_SRC2_TYPE_SHIFT               21
614 #define A2_SRC2_NR_SHIFT                 16
615 #define A2_SRC2_CHANNEL_X_NEGATE         (1<<15)
616 #define A2_SRC2_CHANNEL_X_SHIFT          12
617 #define A2_SRC2_CHANNEL_Y_NEGATE         (1<<11)
618 #define A2_SRC2_CHANNEL_Y_SHIFT          8
619 #define A2_SRC2_CHANNEL_Z_NEGATE         (1<<7)
620 #define A2_SRC2_CHANNEL_Z_SHIFT          4
621 #define A2_SRC2_CHANNEL_W_NEGATE         (1<<3)
622 #define A2_SRC2_CHANNEL_W_SHIFT          0
623 
624 
625 
626 /* Texture instructions */
627 #define T0_TEXLD     (0x15<<24) /* Sample texture using predeclared
628                                  * sampler and address, and output
629                                  * filtered texel data to destination
630                                  * register */
631 #define T0_TEXLDP    (0x16<<24) /* Same as texld but performs a
632                                  * perspective divide of the texture
633                                  * coordinate .xyz values by .w before
634                                  * sampling. */
635 #define T0_TEXLDB    (0x17<<24) /* Same as texld but biases the
636                                  * computed LOD by w.  Only S4.6 two's
637                                  * comp is used.  This implies that a
638                                  * float to fixed conversion is
639                                  * done. */
640 #define T0_TEXKILL   (0x18<<24) /* Does not perform a sampling
641                                  * operation.  Simply kills the pixel
642                                  * if any channel of the address
643                                  * register is < 0.0. */
644 #define T0_DEST_TYPE_SHIFT                19
645 /* Allow: R, OC, OD, U */
646 /* Note: U (unpreserved) regs do not retain their values between
647  * phases (cannot be used for feedback)
648  *
649  * Note: oC and OD registers can only be used as the destination of a
650  * texture instruction once per phase (this is an implementation
651  * restriction).
652  */
653 #define T0_DEST_NR_SHIFT                 14
654 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
655 #define T0_SAMPLER_NR_SHIFT              0      /* This field ignored for TEXKILL */
656 #define T0_SAMPLER_NR_MASK               (0xf<<0)
657 
658 #define T1_ADDRESS_REG_TYPE_SHIFT        24     /* Reg to use as texture coord */
659 /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
660 #define T1_ADDRESS_REG_NR_SHIFT          17
661 #define T2_MBZ                           0
662 
663 /* Declaration instructions */
664 #define D0_DCL       (0x19<<24) /* Declare a t (interpolated attrib)
665                                  * register or an s (sampler)
666                                  * register. */
667 #define D0_SAMPLE_TYPE_SHIFT              22
668 #define D0_SAMPLE_TYPE_2D                 (0x0<<22)
669 #define D0_SAMPLE_TYPE_CUBE               (0x1<<22)
670 #define D0_SAMPLE_TYPE_VOLUME             (0x2<<22)
671 #define D0_SAMPLE_TYPE_MASK               (0x3<<22)
672 
673 #define D0_TYPE_SHIFT                19
674 /* Allow: T, S */
675 #define D0_NR_SHIFT                  14
676 /* Allow T: 0..10, S: 0..15 */
677 #define D0_CHANNEL_X                (1<<10)
678 #define D0_CHANNEL_Y                (2<<10)
679 #define D0_CHANNEL_Z                (4<<10)
680 #define D0_CHANNEL_W                (8<<10)
681 #define D0_CHANNEL_ALL              (0xf<<10)
682 #define D0_CHANNEL_NONE             (0<<10)
683 
684 #define D0_CHANNEL_XY               (D0_CHANNEL_X|D0_CHANNEL_Y)
685 #define D0_CHANNEL_XYZ              (D0_CHANNEL_XY|D0_CHANNEL_Z)
686 
687 /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse
688  * or specular declarations.
689  *
690  * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw)
691  *
692  * Must be zero for S (sampler) dcls
693  */
694 #define D1_MBZ                          0
695 #define D2_MBZ                          0
696 
697 
698 
699 /* p207 */
700 #define _3DSTATE_MAP_STATE               (CMD_3D|(0x1d<<24)|(0x0<<16))
701 
702 #define MS1_MAPMASK_SHIFT               0
703 #define MS1_MAPMASK_MASK                (0x8fff<<0)
704 
705 #define MS2_UNTRUSTED_SURFACE           (1<<31)
706 #define MS2_ADDRESS_MASK                0xfffffffc
707 #define MS2_VERTICAL_LINE_STRIDE        (1<<1)
708 #define MS2_VERTICAL_OFFSET             (1<<1)
709 
710 #define MS3_HEIGHT_SHIFT              21
711 #define MS3_WIDTH_SHIFT               10
712 #define MS3_PALETTE_SELECT            (1<<9)
713 #define MS3_MAPSURF_FORMAT_SHIFT      7
714 #define MS3_MAPSURF_FORMAT_MASK       (0x7<<7)
715 #define    MAPSURF_8BIT		 	   (1<<7)
716 #define    MAPSURF_16BIT		   (2<<7)
717 #define    MAPSURF_32BIT		   (3<<7)
718 #define    MAPSURF_422			   (5<<7)
719 #define    MAPSURF_COMPRESSED		   (6<<7)
720 #define    MAPSURF_4BIT_INDEXED		   (7<<7)
721 #define MS3_MT_FORMAT_MASK         (0x7 << 3)
722 #define MS3_MT_FORMAT_SHIFT        3
723 #define    MT_4BIT_P4		           (7<<3)       /* SURFACE_4BIT_INDEXED */
724 #define    MT_8BIT_I8		           (0<<3)       /* SURFACE_8BIT */
725 #define    MT_8BIT_L8		           (1<<3)
726 #define    MT_8BIT_A4P4		           (2<<3)
727 #define    MT_8BIT_P4A4		           (3<<3)
728 #define    MT_8BIT_A8		           (4<<3)
729 #define    MT_8BIT_MONO8	           (5<<3)
730 #define    MT_16BIT_RGB565 		   (0<<3)       /* SURFACE_16BIT */
731 #define    MT_16BIT_ARGB1555		   (1<<3)
732 #define    MT_16BIT_ARGB4444		   (2<<3)
733 #define    MT_16BIT_AY88		   (3<<3)
734 #define    MT_16BIT_88DVDU	           (5<<3)
735 #define    MT_16BIT_BUMP_655LDVDU	   (6<<3)
736 #define    MT_16BIT_I16	                   (7<<3)
737 #define    MT_16BIT_L16	                   (8<<3)
738 #define    MT_16BIT_A16	                   (9<<3)
739 #define    MT_32BIT_ARGB8888		   (0<<3)       /* SURFACE_32BIT */
740 #define    MT_32BIT_ABGR8888		   (1<<3)
741 #define    MT_32BIT_XRGB8888		   (2<<3)
742 #define    MT_32BIT_XBGR8888		   (3<<3)
743 #define    MT_32BIT_QWVU8888		   (4<<3)
744 #define    MT_32BIT_AXVU8888		   (5<<3)
745 #define    MT_32BIT_LXVU8888	           (6<<3)
746 #define    MT_32BIT_XLVU8888	           (7<<3)
747 #define    MT_32BIT_ARGB2101010	           (8<<3)
748 #define    MT_32BIT_ABGR2101010	           (9<<3)
749 #define    MT_32BIT_AWVU2101010	           (0xA<<3)
750 #define    MT_32BIT_GR1616	           (0xB<<3)
751 #define    MT_32BIT_VU1616	           (0xC<<3)
752 #define    MT_32BIT_xI824	           (0xD<<3)
753 #define    MT_32BIT_xA824	           (0xE<<3)
754 #define    MT_32BIT_xL824	           (0xF<<3)
755 #define    MT_422_YCRCB_SWAPY	           (0<<3)       /* SURFACE_422 */
756 #define    MT_422_YCRCB_NORMAL	           (1<<3)
757 #define    MT_422_YCRCB_SWAPUV	           (2<<3)
758 #define    MT_422_YCRCB_SWAPUVY	           (3<<3)
759 #define    MT_COMPRESS_DXT1		   (0<<3)       /* SURFACE_COMPRESSED */
760 #define    MT_COMPRESS_DXT2_3	           (1<<3)
761 #define    MT_COMPRESS_DXT4_5	           (2<<3)
762 #define    MT_COMPRESS_FXT1		   (3<<3)
763 #define    MT_COMPRESS_DXT1_RGB		   (4<<3)
764 #define MS3_USE_FENCE_REGS              (1<<2)
765 #define MS3_TILED_SURFACE             (1<<1)
766 #define MS3_TILE_WALK_Y                (1<<0)
767 
768 #define MS4_PITCH_SHIFT                 21
769 #define MS4_CUBE_FACE_ENA_NEGX          (1<<20)
770 #define MS4_CUBE_FACE_ENA_POSX          (1<<19)
771 #define MS4_CUBE_FACE_ENA_NEGY          (1<<18)
772 #define MS4_CUBE_FACE_ENA_POSY          (1<<17)
773 #define MS4_CUBE_FACE_ENA_NEGZ          (1<<16)
774 #define MS4_CUBE_FACE_ENA_POSZ          (1<<15)
775 #define MS4_CUBE_FACE_ENA_MASK          (0x3f<<15)
776 #define MS4_MAX_LOD_SHIFT		9
777 #define MS4_MAX_LOD_MASK		(0x3f<<9)
778 #define MS4_MIP_LAYOUT_LEGACY           (0<<8)
779 #define MS4_MIP_LAYOUT_BELOW_LPT        (0<<8)
780 #define MS4_MIP_LAYOUT_RIGHT_LPT        (1<<8)
781 #define MS4_VOLUME_DEPTH_SHIFT          0
782 #define MS4_VOLUME_DEPTH_MASK           (0xff<<0)
783 
784 /* p244 */
785 #define _3DSTATE_SAMPLER_STATE         (CMD_3D|(0x1d<<24)|(0x1<<16))
786 
787 #define SS1_MAPMASK_SHIFT               0
788 #define SS1_MAPMASK_MASK                (0x8fff<<0)
789 
790 #define SS2_REVERSE_GAMMA_ENABLE        (1<<31)
791 #define SS2_PACKED_TO_PLANAR_ENABLE     (1<<30)
792 #define SS2_COLORSPACE_CONVERSION       (1<<29)
793 #define SS2_CHROMAKEY_SHIFT             27
794 #define SS2_BASE_MIP_LEVEL_SHIFT        22
795 #define SS2_BASE_MIP_LEVEL_MASK         (0x1f<<22)
796 #define SS2_MIP_FILTER_SHIFT            20
797 #define SS2_MIP_FILTER_MASK             (0x3<<20)
798 #define   MIPFILTER_NONE       	0
799 #define   MIPFILTER_NEAREST	1
800 #define   MIPFILTER_LINEAR	3
801 #define SS2_MAG_FILTER_SHIFT          17
802 #define SS2_MAG_FILTER_MASK           (0x7<<17)
803 #define   FILTER_NEAREST	0
804 #define   FILTER_LINEAR		1
805 #define   FILTER_ANISOTROPIC	2
806 #define   FILTER_4X4_1    	3
807 #define   FILTER_4X4_2    	4
808 #define   FILTER_4X4_FLAT 	5
809 #define   FILTER_6X5_MONO   	6       /* XXX - check */
810 #define SS2_MIN_FILTER_SHIFT          14
811 #define SS2_MIN_FILTER_MASK           (0x7<<14)
812 #define SS2_LOD_BIAS_SHIFT            5
813 #define SS2_LOD_BIAS_ONE              (0x10<<5)
814 #define SS2_LOD_BIAS_MASK             (0x1ff<<5)
815 /* Shadow requires:
816  *  MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format
817  *  FILTER_4X4_x  MIN and MAG filters
818  */
819 #define SS2_SHADOW_ENABLE             (1<<4)
820 #define SS2_MAX_ANISO_MASK            (1<<3)
821 #define SS2_MAX_ANISO_2               (0<<3)
822 #define SS2_MAX_ANISO_4               (1<<3)
823 #define SS2_SHADOW_FUNC_SHIFT         0
824 #define SS2_SHADOW_FUNC_MASK          (0x7<<0)
825 /* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */
826 
827 #define SS3_MIN_LOD_SHIFT            24
828 #define SS3_MIN_LOD_ONE              (0x10<<24)
829 #define SS3_MIN_LOD_MASK             (0xff<<24)
830 #define SS3_KILL_PIXEL_ENABLE        (1<<17)
831 #define SS3_TCX_ADDR_MODE_SHIFT      12
832 #define SS3_TCX_ADDR_MODE_MASK       (0x7<<12)
833 #define   TEXCOORDMODE_WRAP		0
834 #define   TEXCOORDMODE_MIRROR		1
835 #define   TEXCOORDMODE_CLAMP_EDGE	2
836 #define   TEXCOORDMODE_CUBE       	3
837 #define   TEXCOORDMODE_CLAMP_BORDER	4
838 #define   TEXCOORDMODE_MIRROR_ONCE      5
839 #define SS3_TCY_ADDR_MODE_SHIFT      9
840 #define SS3_TCY_ADDR_MODE_MASK       (0x7<<9)
841 #define SS3_TCZ_ADDR_MODE_SHIFT      6
842 #define SS3_TCZ_ADDR_MODE_MASK       (0x7<<6)
843 #define SS3_NORMALIZED_COORDS        (1<<5)
844 #define SS3_TEXTUREMAP_INDEX_SHIFT   1
845 #define SS3_TEXTUREMAP_INDEX_MASK    (0xf<<1)
846 #define SS3_DEINTERLACER_ENABLE      (1<<0)
847 
848 #define SS4_BORDER_COLOR_MASK        (~0)
849 
850 /* 3DSTATE_SPAN_STIPPLE, p258
851  */
852 #define _3DSTATE_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
853 #define ST1_ENABLE               (1<<16)
854 #define ST1_MASK                 (0xffff)
855 
856 #define _3DSTATE_DEFAULT_Z          ((0x3<<29)|(0x1d<<24)|(0x98<<16))
857 #define _3DSTATE_DEFAULT_DIFFUSE    ((0x3<<29)|(0x1d<<24)|(0x99<<16))
858 #define _3DSTATE_DEFAULT_SPECULAR   ((0x3<<29)|(0x1d<<24)|(0x9a<<16))
859 
860 
861 #define MI_FLUSH                   ((0<<29)|(4<<23))
862 #define FLUSH_MAP_CACHE            (1<<0)
863 #define INHIBIT_FLUSH_RENDER_CACHE (1<<2)
864 #define MI_NOOP                    0
865 
866 
867 #define CMD_3D (0x3<<29)
868 
869 
870 #define _3DPRIMITIVE         ((0x3<<29)|(0x1f<<24))
871 #define PRIM_INDIRECT            (1<<23)
872 #define PRIM_INLINE              (0<<23)
873 #define PRIM_INDIRECT_SEQUENTIAL (0<<17)
874 #define PRIM_INDIRECT_ELTS       (1<<17)
875 
876 #define PRIM3D_TRILIST		(0x0<<18)
877 #define PRIM3D_TRISTRIP 	(0x1<<18)
878 #define PRIM3D_TRISTRIP_RVRSE	(0x2<<18)
879 #define PRIM3D_TRIFAN		(0x3<<18)
880 #define PRIM3D_POLY		(0x4<<18)
881 #define PRIM3D_LINELIST 	(0x5<<18)
882 #define PRIM3D_LINESTRIP	(0x6<<18)
883 #define PRIM3D_RECTLIST 	(0x7<<18)
884 #define PRIM3D_POINTLIST	(0x8<<18)
885 #define PRIM3D_DIB		(0x9<<18)
886 #define PRIM3D_MASK		(0x1f<<18)
887 
888 #define I915PACKCOLOR4444(r,g,b,a) \
889   ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
890 
891 #define I915PACKCOLOR1555(r,g,b,a) \
892   ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
893     ((a) ? 0x8000 : 0))
894 
895 #define I915PACKCOLOR565(r,g,b) \
896   ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
897 
898 #define I915PACKCOLOR8888(r,g,b,a) \
899   ((a<<24) | (r<<16) | (g<<8) | b)
900 
901 
902 
903 
904 #define BR00_BITBLT_CLIENT   0x40000000
905 #define BR00_OP_COLOR_BLT    0x10000000
906 #define BR00_OP_SRC_COPY_BLT 0x10C00000
907 #define BR13_SOLID_PATTERN   0x80000000
908 
909 #define XY_COLOR_BLT_CMD		((2<<29)|(0x50<<22)|0x4)
910 #define XY_COLOR_BLT_WRITE_ALPHA	(1<<21)
911 #define XY_COLOR_BLT_WRITE_RGB		(1<<20)
912 
913 #define XY_SRC_COPY_BLT_CMD             ((2<<29)|(0x53<<22)|6)
914 #define XY_SRC_COPY_BLT_WRITE_ALPHA     (1<<21)
915 #define XY_SRC_COPY_BLT_WRITE_RGB       (1<<20)
916 
917 #define MI_WAIT_FOR_EVENT               ((0x3<<23))
918 #define MI_WAIT_FOR_PLANE_B_FLIP        (1<<6)
919 #define MI_WAIT_FOR_PLANE_A_FLIP        (1<<2)
920 
921 #define MI_BATCH_BUFFER                 (0x30<<23)
922 #define MI_BATCH_BUFFER_START           (0x31<<23)
923 #define MI_BATCH_BUFFER_END             (0xa<<23)
924 
925 
926 
927 #define COMPAREFUNC_ALWAYS		0
928 #define COMPAREFUNC_NEVER		0x1
929 #define COMPAREFUNC_LESS		0x2
930 #define COMPAREFUNC_EQUAL		0x3
931 #define COMPAREFUNC_LEQUAL		0x4
932 #define COMPAREFUNC_GREATER		0x5
933 #define COMPAREFUNC_NOTEQUAL		0x6
934 #define COMPAREFUNC_GEQUAL		0x7
935 
936 #define STENCILOP_KEEP			0
937 #define STENCILOP_ZERO			0x1
938 #define STENCILOP_REPLACE		0x2
939 #define STENCILOP_INCRSAT		0x3
940 #define STENCILOP_DECRSAT		0x4
941 #define STENCILOP_INCR			0x5
942 #define STENCILOP_DECR			0x6
943 #define STENCILOP_INVERT		0x7
944 
945 #define LOGICOP_CLEAR			0
946 #define LOGICOP_NOR			0x1
947 #define LOGICOP_AND_INV 		0x2
948 #define LOGICOP_COPY_INV		0x3
949 #define LOGICOP_AND_RVRSE		0x4
950 #define LOGICOP_INV			0x5
951 #define LOGICOP_XOR			0x6
952 #define LOGICOP_NAND			0x7
953 #define LOGICOP_AND			0x8
954 #define LOGICOP_EQUIV			0x9
955 #define LOGICOP_NOOP			0xa
956 #define LOGICOP_OR_INV			0xb
957 #define LOGICOP_COPY			0xc
958 #define LOGICOP_OR_RVRSE		0xd
959 #define LOGICOP_OR			0xe
960 #define LOGICOP_SET			0xf
961 
962 #define BLENDFACT_ZERO			0x01
963 #define BLENDFACT_ONE			0x02
964 #define BLENDFACT_SRC_COLR		0x03
965 #define BLENDFACT_INV_SRC_COLR 		0x04
966 #define BLENDFACT_SRC_ALPHA		0x05
967 #define BLENDFACT_INV_SRC_ALPHA 	0x06
968 #define BLENDFACT_DST_ALPHA		0x07
969 #define BLENDFACT_INV_DST_ALPHA 	0x08
970 #define BLENDFACT_DST_COLR		0x09
971 #define BLENDFACT_INV_DST_COLR		0x0a
972 #define BLENDFACT_SRC_ALPHA_SATURATE	0x0b
973 #define BLENDFACT_CONST_COLOR		0x0c
974 #define BLENDFACT_INV_CONST_COLOR	0x0d
975 #define BLENDFACT_CONST_ALPHA		0x0e
976 #define BLENDFACT_INV_CONST_ALPHA	0x0f
977 #define BLENDFACT_MASK          	0x0f
978 
979 #define PCI_CHIP_I915_G			0x2582
980 #define PCI_CHIP_I915_GM		0x2592
981 #define PCI_CHIP_I945_G			0x2772
982 #define PCI_CHIP_I945_GM		0x27A2
983 #define PCI_CHIP_I945_GME		0x27AE
984 #define PCI_CHIP_G33_G			0x29C2
985 #define PCI_CHIP_Q35_G			0x29B2
986 #define PCI_CHIP_Q33_G			0x29D2
987 #define PCI_CHIP_PINEVIEW_G		0xA001
988 #define PCI_CHIP_PINEVIEW_M		0xA011
989 
990 
991 #endif
992