Searched refs:MaskUpper (Results 1 – 3 of 3) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 972 unsigned MaskUpper = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword() local
1021 BuildMI(BB, dl, TII->get(Mips::ORi), MaskUpper) in EmitAtomicBinaryPartword()
1024 .addReg(ShiftAmt).addReg(MaskUpper); in EmitAtomicBinaryPartword()
1194 unsigned MaskUpper = RegInfo.createVirtualRegister(RC); in EmitAtomicCmpSwapPartword() local
1249 BuildMI(BB, dl, TII->get(Mips::ORi), MaskUpper) in EmitAtomicCmpSwapPartword()
1252 .addReg(ShiftAmt).addReg(MaskUpper); in EmitAtomicCmpSwapPartword()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1254 unsigned MaskUpper = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1319 BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper) in emitAtomicBinaryPartword()
1322 .addReg(MaskUpper).addReg(ShiftAmt); in emitAtomicBinaryPartword()
1510 unsigned MaskUpper = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
1582 BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper) in emitAtomicCmpSwapPartword()
1585 .addReg(MaskUpper).addReg(ShiftAmt); in emitAtomicCmpSwapPartword()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1576 unsigned MaskUpper = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1667 BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper) in emitAtomicBinaryPartword()
1670 .addReg(MaskUpper).addReg(ShiftAmt); in emitAtomicBinaryPartword()
1789 unsigned MaskUpper = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
1850 BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper) in emitAtomicCmpSwapPartword()
1853 .addReg(MaskUpper).addReg(ShiftAmt); in emitAtomicCmpSwapPartword()
|