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Searched refs:Narrow (Results 1 – 25 of 44) sorted by relevance

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/external/vixl/benchmarks/aarch32/
Dasm-disasm-speed-test.cc202 __ push(Narrow, RegisterList(0x40f8)); in Generate_1()
203 __ mov(Narrow, r7, r2); in Generate_1()
204 __ ldr(Narrow, r6, MemOperand(r7)); in Generate_1()
205 __ mov(Narrow, r4, r0); in Generate_1()
206 __ movs(Narrow, r3, 0U); in Generate_1()
207 __ movs(Narrow, r5, 1U); in Generate_1()
208 __ ldr(Narrow, r2, &l_00a8); in Generate_1()
209 __ movs(Narrow, r0, 4U); in Generate_1()
210 __ cmp(Narrow, r6, 14U); in Generate_1()
212 __ str(Narrow, r0, MemOperand(r4, 12)); in Generate_1()
[all …]
/external/skia/src/sfnt/
DSkPanose.h476 Narrow = 8, enumerator
489 Narrow = 8, enumerator
502 Narrow = 8, enumerator
515 Narrow = 8, enumerator
/external/skqp/src/sfnt/
DSkPanose.h476 Narrow = 8, enumerator
489 Narrow = 8, enumerator
502 Narrow = 8, enumerator
515 Narrow = 8, enumerator
/external/libavc/common/arm/
Dih264_resi_trans_quant_a9.s207 vmovn.s32 d30, q11 @Narrow row 1
208 vmovn.s32 d31, q12 @Narrow row 2
209 vmovn.s32 d0 , q13 @Narrow row 3
210 vmovn.s32 d1 , q14 @Narrow row 4
222 vmovn.u16 d14, q5 @I Narrow the comparison for row 1 and 2 blk 1
223 vmovn.u16 d15, q6 @I Narrow the comparison for row 1 and 2 blk 2
402 vmovn.s32 d30, q11 @Narrow row 1
403 vmovn.s32 d31, q12 @Narrow row 2
404 vmovn.s32 d0 , q13 @Narrow row 3
405 vmovn.s32 d1 , q14 @Narrow row 4
[all …]
/external/u-boot/drivers/video/fonts/
DKconfig21 bool "Anka Coder Narrow"
25 code and terminals, in two styles and weights. Anka/Coder Narrow was
/external/libcups/cups/
Dtest2.ppd230 *Font Helvetica-Narrow: Standard "(001.006S)" Standard ROM
231 *Font Helvetica-Narrow-Bold: Standard "(001.007S)" Standard ROM
232 *Font Helvetica-Narrow-BoldOblique: Standard "(001.007S)" Standard ROM
233 *Font Helvetica-Narrow-Oblique: Standard "(001.006S)" Standard ROM
Dtest.ppd249 *Font Helvetica-Narrow: Standard "(001.006S)" Standard ROM
250 *Font Helvetica-Narrow-Bold: Standard "(001.007S)" Standard ROM
251 *Font Helvetica-Narrow-BoldOblique: Standard "(001.007S)" Standard ROM
252 *Font Helvetica-Narrow-Oblique: Standard "(001.006S)" Standard ROM
/external/autotest/client/site_tests/platform_DebugDaemonCupsAddPrinters/src/
DGenericPostScript.ppd.gz
/external/libxkbcommon/xkbcommon/test/data/symbols/
Dnbsp1 // Let Space key provide No-Break Space (NBSP), Narrow No-Break Space (NNBSP),
63 // Narrow No-Break Space
/external/skia/src/utils/
DSkWhitelistChecksums.inc39 { "Mukti Narrow", 0x53f7d053, false, false },
/external/skqp/src/utils/
DSkWhitelistChecksums.inc39 { "Mukti Narrow", 0x53f7d053, false, false },
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrAVX512.td3129 X86VectorVTInfo Narrow,
3131 def : Pat<(Narrow.KVT (Frag (Narrow.VT Narrow.RC:$src1),
3132 (Narrow.VT Narrow.RC:$src2))),
3135 (Wide.VT (INSERT_SUBREG (IMPLICIT_DEF), Narrow.RC:$src1, Narrow.SubRegIdx)),
3136 (Wide.VT (INSERT_SUBREG (IMPLICIT_DEF), Narrow.RC:$src2, Narrow.SubRegIdx))),
3137 Narrow.KRC)>;
3139 def : Pat<(Narrow.KVT (and Narrow.KRC:$mask,
3140 (Frag (Narrow.VT Narrow.RC:$src1),
3141 (Narrow.VT Narrow.RC:$src2)))),
3144 (COPY_TO_REGCLASS Narrow.KRC:$mask, Wide.KRC),
[all …]
/external/vixl/src/aarch32/
Ddisasm-aarch32.cc7008 Narrow, in DecodeT32()
7016 Narrow, in DecodeT32()
7031 Narrow, in DecodeT32()
7039 Narrow, in DecodeT32()
7053 add(CurrentCond(), Narrow, Register(rd), Register(rn), imm); in DecodeT32()
7058 Narrow, in DecodeT32()
7072 sub(CurrentCond(), Narrow, Register(rd), Register(rn), imm); in DecodeT32()
7077 Narrow, in DecodeT32()
7099 asr(CurrentCond(), Narrow, Register(rd), Register(rm), amount); in DecodeT32()
7109 asrs(Condition::None(), Narrow, Register(rd), Register(rm), amount); in DecodeT32()
[all …]
Dinstructions-aarch32.cc441 case Narrow: in GetName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp1331 bool Narrow = VT.getSizeInBits() == 64; in SelectLoadLane() local
1336 if (Narrow) in SelectLoadLane()
1357 if (Narrow) in SelectLoadLane()
1370 bool Narrow = VT.getSizeInBits() == 64; in SelectPostLoadLane() local
1375 if (Narrow) in SelectPostLoadLane()
1402 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1410 if (Narrow) in SelectPostLoadLane()
1425 bool Narrow = VT.getSizeInBits() == 64; in SelectStoreLane() local
1430 if (Narrow) in SelectStoreLane()
1455 bool Narrow = VT.getSizeInBits() == 64; in SelectPostStoreLane() local
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/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp1263 bool Narrow = VT.getSizeInBits() == 64; in SelectLoadLane() local
1268 if (Narrow) in SelectLoadLane()
1289 if (Narrow) in SelectLoadLane()
1302 bool Narrow = VT.getSizeInBits() == 64; in SelectPostLoadLane() local
1307 if (Narrow) in SelectPostLoadLane()
1334 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1342 if (Narrow) in SelectPostLoadLane()
1357 bool Narrow = VT.getSizeInBits() == 64; in SelectStoreLane() local
1362 if (Narrow) in SelectStoreLane()
1387 bool Narrow = VT.getSizeInBits() == 64; in SelectPostStoreLane() local
[all …]
/external/llvm/include/llvm/IR/
DIntrinsicsAArch64.td352 // Vector Saturating Narrow
358 // Vector Saturating Extract and Unsigned Narrow
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
Dv8_IT_6.ll3 ; Narrow tORR cannot be predicated and set CPSR at the same time!
/external/u-boot/Licenses/
DOFL.txt2 with Reserved Font Name Anka/Coder Narrow.
/external/llvm/test/CodeGen/Thumb2/
Dv8_IT_6.ll3 ; Narrow tORR cannot be predicated and set CPSR at the same time!
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1427 # Narrow
1784 # Scalar Signed Saturating Extract Unsigned Narrow
1794 # Scalar Signed Saturating Extract Signed Narrow
1804 # Scalar Unsigned Saturating Extract Narrow
1916 # Signed Saturating Shift Right Narrow (Immediate)
1926 # Unsigned Saturating Shift Right Narrow (Immediate)
1936 # Signed Saturating Rounded Shift Right Narrow (Immediate)
1946 # Unsigned Saturating Rounded Shift Right Narrow (Immediate)
1956 # Signed Saturating Shift Right Unsigned Narrow (Immediate)
1966 # Signed Saturating Rounded Shift Right Unsigned Narrow (Immediate)
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1427 # Narrow
1784 # Scalar Signed Saturating Extract Unsigned Narrow
1794 # Scalar Signed Saturating Extract Signed Narrow
1804 # Scalar Unsigned Saturating Extract Narrow
1916 # Signed Saturating Shift Right Narrow (Immediate)
1926 # Unsigned Saturating Shift Right Narrow (Immediate)
1936 # Signed Saturating Rounded Shift Right Narrow (Immediate)
1946 # Unsigned Saturating Rounded Shift Right Narrow (Immediate)
1956 # Signed Saturating Shift Right Unsigned Narrow (Immediate)
1966 # Signed Saturating Rounded Shift Right Unsigned Narrow (Immediate)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DIntrinsicsAArch64.td354 // Vector Saturating Narrow
360 // Vector Saturating Extract and Unsigned Narrow
/external/clang/include/clang/Basic/
Darm_neon.td1394 // Signed/Unsigned Saturating Shift Right Narrow (Immediate)
1396 // Signed/Unsigned Saturating Rounded Shift Right Narrow (Immediate)
1398 // Signed Saturating Shift Right Unsigned Narrow (Immediate)
1400 // Signed Saturating Rounded Shift Right Unsigned Narrow (Immediate)
1588 // Scalar Signed Saturating Extract Unsigned Narrow
1592 // Scalar Signed Saturating Extract Narrow
1596 // Scalar Unsigned Saturating Extract Narrow
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopStrengthReduce/
Dillegal-addr-modes.ll11 ; "[LSR] Narrow search space by filtering non-optimal formulae with the

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