/external/llvm/lib/CodeGen/ |
D | MachineSSAUpdater.cpp | 118 unsigned NewVR = MRI->createVirtualRegister(RC); in InsertNewDef() local 119 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); in InsertNewDef() 223 unsigned NewVR = 0; in RewriteUse() local 226 NewVR = GetValueAtEndOfBlockInternal(SourceBB); in RewriteUse() 228 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse() 231 U.setReg(NewVR); in RewriteUse()
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D | PeepholeOptimizer.cpp | 539 unsigned NewVR = MRI->createVirtualRegister(RC); in INITIALIZE_PASS_DEPENDENCY() local 541 TII->get(TargetOpcode::COPY), NewVR) in INITIALIZE_PASS_DEPENDENCY() 548 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY() 720 unsigned NewVR = MRI->createVirtualRegister(NewRC); in insertPHI() local 723 TII->get(TargetOpcode::PHI), NewVR); in insertPHI() 939 unsigned NewVR = MRI.createVirtualRegister(DefRC); in RewriteSource() local 943 TII.get(TargetOpcode::COPY), NewVR) in RewriteSource() 953 MRI.replaceRegWith(Def.Reg, NewVR); in RewriteSource() 954 MRI.clearKillFlags(NewVR); in RewriteSource()
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D | TargetInstrInfo.cpp | 721 unsigned NewVR = MRI.createVirtualRegister(RC); in reassociateOps() local 722 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in reassociateOps() 731 BuildMI(*MF, Prev.getDebugLoc(), TII->get(Opcode), NewVR) in reassociateOps() 737 .addReg(NewVR, getKillRegState(true)); in reassociateOps()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | MachineSSAUpdater.cpp | 117 unsigned NewVR = MRI->createVirtualRegister(RC); in InsertNewDef() local 118 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); in InsertNewDef() 224 unsigned NewVR = 0; in RewriteUse() local 227 NewVR = GetValueAtEndOfBlockInternal(SourceBB); in RewriteUse() 229 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse() 232 U.setReg(NewVR); in RewriteUse()
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D | PeepholeOptimizer.cpp | 243 unsigned NewVR = MRI->createVirtualRegister(RC); in OptimizeExtInstr() local 245 TII->get(TargetOpcode::COPY), NewVR) in OptimizeExtInstr() 248 UseMO->setReg(NewVR); in OptimizeExtInstr()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | MachineSSAUpdater.cpp | 122 unsigned NewVR = MRI->createVirtualRegister(RC); in InsertNewDef() local 123 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); in InsertNewDef() 226 unsigned NewVR = 0; in RewriteUse() local 229 NewVR = GetValueAtEndOfBlockInternal(SourceBB); in RewriteUse() 231 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); in RewriteUse() 234 U.setReg(NewVR); in RewriteUse()
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D | PeepholeOptimizer.cpp | 585 unsigned NewVR = MRI->createVirtualRegister(RC); in INITIALIZE_PASS_DEPENDENCY() local 587 TII->get(TargetOpcode::COPY), NewVR) in INITIALIZE_PASS_DEPENDENCY() 594 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY() 765 unsigned NewVR = MRI.createVirtualRegister(NewRC); in insertPHI() local 768 TII.get(TargetOpcode::PHI), NewVR); in insertPHI()
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D | TargetInstrInfo.cpp | 831 unsigned NewVR = MRI.createVirtualRegister(RC); in reassociateOps() local 832 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in reassociateOps() 841 BuildMI(*MF, Prev.getDebugLoc(), TII->get(Opcode), NewVR) in reassociateOps() 847 .addReg(NewVR, getKillRegState(true)); in reassociateOps()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.cpp | 4222 unsigned NewVR = MRI.createVirtualRegister(OrrRC); in genAlternativeCodeSequence() local 4233 BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) in genAlternativeCodeSequence() 4237 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genAlternativeCodeSequence() 4238 MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); in genAlternativeCodeSequence() 4264 unsigned NewVR = MRI.createVirtualRegister(SubRC); in genAlternativeCodeSequence() local 4267 BuildMI(MF, Root.getDebugLoc(), TII->get(SubOpc), NewVR) in genAlternativeCodeSequence() 4271 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genAlternativeCodeSequence() 4272 MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); in genAlternativeCodeSequence() 4314 unsigned NewVR = MRI.createVirtualRegister(OrrRC); in genAlternativeCodeSequence() local 4324 BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) in genAlternativeCodeSequence() [all …]
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D | AArch64ISelLowering.cpp | 11526 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local 11536 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR() 11543 .addReg(NewVR); in insertCopiesSplitCSR()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.cpp | 3454 unsigned NewVR = MRI.createVirtualRegister(OrrRC); in genAlternativeCodeSequence() local 3465 BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) in genAlternativeCodeSequence() 3469 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genAlternativeCodeSequence() 3470 MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); in genAlternativeCodeSequence() 3496 unsigned NewVR = MRI.createVirtualRegister(SubRC); in genAlternativeCodeSequence() local 3499 BuildMI(MF, Root.getDebugLoc(), TII->get(SubOpc), NewVR) in genAlternativeCodeSequence() 3503 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); in genAlternativeCodeSequence() 3504 MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); in genAlternativeCodeSequence() 3546 unsigned NewVR = MRI.createVirtualRegister(OrrRC); in genAlternativeCodeSequence() local 3556 BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) in genAlternativeCodeSequence() [all …]
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D | AArch64ISelLowering.cpp | 10346 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local 10356 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR() 10363 .addReg(NewVR); in insertCopiesSplitCSR()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonGenInsert.cpp | 1371 unsigned NewVR = MRI->createVirtualRegister(RC); in generateInserts() local 1372 RegMap[VR] = NewVR; in generateInserts()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonGenInsert.cpp | 1403 unsigned NewVR = MRI->createVirtualRegister(RC); in generateInserts() local 1404 RegMap[VR] = NewVR; in generateInserts()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 1736 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local 1739 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR() 1746 .addReg(NewVR); in insertCopiesSplitCSR()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 12112 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local 12122 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR() 12129 .addReg(NewVR); in insertCopiesSplitCSR()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 12845 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local 12855 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR() 12862 .addReg(NewVR); in insertCopiesSplitCSR()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 14970 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local 14980 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR() 14987 .addReg(NewVR); in insertCopiesSplitCSR()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 14031 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local 14041 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR() 14048 .addReg(NewVR); in insertCopiesSplitCSR()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 31907 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local 31917 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR() 31924 .addReg(NewVR); in insertCopiesSplitCSR()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 40786 unsigned NewVR = MRI->createVirtualRegister(RC); in insertCopiesSplitCSR() local 40796 BuildMI(*Entry, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY), NewVR) in insertCopiesSplitCSR() 40803 .addReg(NewVR); in insertCopiesSplitCSR()
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