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Searched refs:OR_V (Results 1 – 21 of 21) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenMCPseudoLowering.inc353 TmpInst.setOpcode(Mips::OR_V);
369 TmpInst.setOpcode(Mips::OR_V);
385 TmpInst.setOpcode(Mips::OR_V);
DMipsGenMCCodeEmitter.inc2078 UINT64_C(2015363102), // OR_V
7386 case Mips::OR_V:
9804 Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V = 2065
DMipsGenAsmWriter.inc3293 268459734U, // OR_V
5924 0U, // OR_V
DMipsGenFastISel.inc1870 return fastEmitInst_rr(Mips::OR_V, &Mips::MSA128BRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
DMipsGenInstrInfo.inc2080 OR_V = 2065,
6125 …65, 3, 1, 4, 528, 0, 0x6ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr }, // Inst #2065 = OR_V
DMipsGenGlobalISel.inc2350 …// (or:{ *:[v16i8] } MSA128BOpnd:{ *:[v16i8] }:$ws, MSA128BOpnd:{ *:[v16i8] }:$wt) => (OR_V:{ *:…
2351 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::OR_V,
DMipsGenDisassemblerTables.inc5283 /* 12560 */ MCD::OPC_Decode, 145, 16, 250, 1, // Opcode: OR_V
DMipsGenAsmMatcher.inc6966 …{ 7198 /* or.v */, Mips::OR_V, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__MSA128AsmReg1_2, Feature…
DMipsGenDAGISel.inc20158 /* 37314*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::OR_V), 0,
20161 … // Dst: (OR_V:{ *:[v16i8] } MSA128BOpnd:{ *:[v16i8] }:$ws, MSA128BOpnd:{ *:[v16i8] }:$wt)
/external/v8/src/mips/
Dconstants-mips.h790 OR_V = (((0U << 2) + 1) << 21), enumerator
Ddisasm-mips.cc2582 case OR_V: in DecodeTypeMsaVec()
Dassembler-mips.cc3353 V(or_v, OR_V) \
Dsimulator-mips.cc5739 case OR_V: in DecodeTypeMsaVec()
/external/v8/src/mips64/
Dconstants-mips64.h824 OR_V = (((0U << 2) + 1) << 21), enumerator
Ddisasm-mips64.cc2896 case OR_V: in DecodeTypeMsaVec()
Dassembler-mips64.cc3670 V(or_v, OR_V) \
Dsimulator-mips64.cc5963 case OR_V: in DecodeTypeMsaVec()
/external/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3348 def OR_V : OR_V_ENC, OR_V_DESC;
3350 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3354 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3358 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3369 def OR_V : OR_V_ENC, OR_V_DESC;
3371 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3375 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3379 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc1266 33577831U, // OR_V
2980 0U, // OR_V
DMipsGenDisassemblerTables.inc2824 /* 9816 */ MCD_OPC_Decode, 225, 9, 114, // Opcode: OR_V