/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/InstPrinter/ |
D | LanaiInstPrinter.cpp | 224 const MCOperand &OffsetOp, in printMemoryImmediateOffset() argument 226 assert((OffsetOp.isImm() || OffsetOp.isExpr()) && "Immediate expected"); in printMemoryImmediateOffset() 227 if (OffsetOp.isImm()) { in printMemoryImmediateOffset() 228 assert(isInt<SizeInBits>(OffsetOp.getImm()) && "Constant value truncated"); in printMemoryImmediateOffset() 229 OS << OffsetOp.getImm(); in printMemoryImmediateOffset() 231 OffsetOp.getExpr()->print(OS, &MAI); in printMemoryImmediateOffset() 238 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRiOperand() local 243 printMemoryImmediateOffset<16>(MAI, OffsetOp, OS); in printMemRiOperand() 253 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRrOperand() local 256 assert(OffsetOp.isReg() && RegOp.isReg() && "Registers expected."); in printMemRrOperand() [all …]
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/external/llvm/lib/Target/Lanai/InstPrinter/ |
D | LanaiInstPrinter.cpp | 224 const MCOperand &OffsetOp, in printMemoryImmediateOffset() argument 226 assert((OffsetOp.isImm() || OffsetOp.isExpr()) && "Immediate expected"); in printMemoryImmediateOffset() 227 if (OffsetOp.isImm()) { in printMemoryImmediateOffset() 228 assert(isInt<SizeInBits>(OffsetOp.getImm()) && "Constant value truncated"); in printMemoryImmediateOffset() 229 OS << OffsetOp.getImm(); in printMemoryImmediateOffset() 231 OffsetOp.getExpr()->print(OS, &MAI); in printMemoryImmediateOffset() 238 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRiOperand() local 243 printMemoryImmediateOffset<16>(MAI, OffsetOp, OS); in printMemRiOperand() 253 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemRrOperand() local 256 assert(OffsetOp.isReg() && RegOp.isReg() && "Registers expected."); in printMemRrOperand() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/InstPrinter/ |
D | AVRInstPrinter.cpp | 150 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemri() local 156 if (OffsetOp.isImm()) { in printMemri() 157 int64_t Offset = OffsetOp.getImm(); in printMemri() 163 } else if (OffsetOp.isExpr()) { in printMemri() 164 O << *OffsetOp.getExpr(); in printMemri()
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/external/llvm/lib/Target/BPF/InstPrinter/ |
D | BPFInstPrinter.cpp | 69 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemOperand() local 71 if (OffsetOp.isImm()) in printMemOperand() 72 O << formatDec(OffsetOp.getImm()); in printMemOperand()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/MCTargetDesc/ |
D | AVRMCCodeEmitter.cpp | 138 auto OffsetOp = MI.getOperand(OpNo + 1); in encodeMemri() local 157 if (OffsetOp.isImm()) { in encodeMemri() 158 OffsetBits = OffsetOp.getImm(); in encodeMemri() 159 } else if (OffsetOp.isExpr()) { in encodeMemri() 161 Fixups.push_back(MCFixup::create(0, OffsetOp.getExpr(), in encodeMemri()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/InstPrinter/ |
D | BPFInstPrinter.cpp | 68 const MCOperand &OffsetOp = MI->getOperand(OpNo + 1); in printMemOperand() local 75 if (OffsetOp.isImm()) { in printMemOperand() 76 auto Imm = OffsetOp.getImm(); in printMemOperand()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyRegisterInfo.cpp | 112 unsigned OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex() local 114 OffsetOp) in eliminateFrameIndex() 120 .addReg(OffsetOp); in eliminateFrameIndex()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyRegisterInfo.cpp | 118 unsigned OffsetOp = MRI.createVirtualRegister(PtrRC); in eliminateFrameIndex() local 120 OffsetOp) in eliminateFrameIndex() 126 .addReg(OffsetOp); in eliminateFrameIndex()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonOptAddrMode.cpp | 162 const MachineOperand &OffsetOp = MI.getOperand(3); in canRemoveAddasl() local 163 if (!OffsetOp.isImm() || OffsetOp.getImm() > 3) in canRemoveAddasl() 369 MachineOperand OffsetOp = MID.mayLoad() ? MI->getOperand(2) in processAddUses() local 371 if (!OffsetOp.isImm()) in processAddUses() 374 int64_t newOffset = OffsetOp.getImm() + AddMI->getOperand(2).getImm(); in processAddUses() 420 MachineOperand &OffsetOp = MID.mayLoad() ? UseMI->getOperand(2) in updateAddUses() local 425 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
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D | HexagonInstrInfo.cpp | 1879 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getIncrementValue() local 1880 if (OffsetOp.isImm()) { in getIncrementValue() 1881 Value = OffsetOp.getImm(); in getIncrementValue() 3121 const MachineOperand &OffsetOp = MI.getOperand(OffsetPos); in getBaseAndOffset() local 3122 if (!OffsetOp.isImm()) in getBaseAndOffset() 3124 Offset = OffsetOp.getImm(); in getBaseAndOffset()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonOptAddrMode.cpp | 143 const MachineOperand &OffsetOp = MI->getOperand(3); in canRemoveAddasl() local 144 if (!OffsetOp.isImm() || OffsetOp.getImm() > 3) in canRemoveAddasl()
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D | HexagonInstrInfoV4.td | 1066 class T_StoreImm <string mnemonic, Operand OffsetOp, bits<2> MajOp > 1067 : STInst <(outs ), (ins IntRegs:$Rs, OffsetOp:$offset, s8Ext:$S8), 1076 string OffsetOpStr = !cast<string>(OffsetOp); 1093 class T_StoreImm_pred <string mnemonic, Operand OffsetOp, bits<2> MajOp, 1096 (ins PredRegs:$Pv, IntRegs:$Rs, OffsetOp:$offset, s6Ext:$S6), 1107 string OffsetOpStr = !cast<string>(OffsetOp); 1135 multiclass ST_Imm_Pred <string mnemonic, Operand OffsetOp, bits<2> MajOp, 1137 def _io : T_StoreImm_pred <mnemonic, OffsetOp, MajOp, PredNot, 0>; 1139 def new_io : T_StoreImm_pred <mnemonic, OffsetOp, MajOp, PredNot, 1>; 1142 multiclass ST_Imm <string mnemonic, string CextOp, Operand OffsetOp, [all …]
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/external/llvm/lib/Target/AMDGPU/ |
D | SIRegisterInfo.cpp | 329 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); in resolveFrameIndex() local 330 int64_t NewOffset = OffsetOp->getImm() + Offset; in resolveFrameIndex() 334 OffsetOp->setImm(NewOffset); in resolveFrameIndex()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIRegisterInfo.cpp | 364 MachineOperand *OffsetOp = TII->getNamedOperand(MI, AMDGPU::OpName::offset); in resolveFrameIndex() local 365 int64_t NewOffset = OffsetOp->getImm() + Offset; in resolveFrameIndex() 369 OffsetOp->setImm(NewOffset); in resolveFrameIndex()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64FrameLowering.cpp | 915 const MachineOperand &OffsetOp = Pop->getOperand(Pop->getNumOperands() - 1); in emitEpilogue() local 917 if (OffsetOp.getImm() == 0) { in emitEpilogue()
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D | AArch64ISelDAGToDAG.cpp | 1165 ConstantSDNode *OffsetOp = cast<ConstantSDNode>(LD->getOffset()); in tryIndexedLoad() local 1166 int OffsetVal = (int)OffsetOp->getZExtValue(); in tryIndexedLoad()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 3574 const MCOperand &OffsetOp = Inst.getOperand(2); in expandMemInst() local 3596 if (OffsetOp.isImm()) { in expandMemInst() 3597 int64_t LoOffset = OffsetOp.getImm() & 0xffff; in expandMemInst() 3598 int64_t HiOffset = OffsetOp.getImm() & ~0xffff; in expandMemInst() 3619 assert(OffsetOp.isExpr() && "expected expression operand kind"); in expandMemInst() 3620 const MCExpr *ExprOffset = OffsetOp.getExpr(); in expandMemInst()
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/external/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringX86BaseImpl.h | 5891 Constant *OffsetOp = nullptr; 5893 OffsetOp = Ctx->getConstantInt32(NewAddr.Offset); 5895 OffsetOp = 5906 return X86OperandMem::create(Func, MemType, NewAddr.Base, OffsetOp,
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1108 ConstantSDNode *OffsetOp = cast<ConstantSDNode>(LD->getOffset()); in tryIndexedLoad() local 1109 int OffsetVal = (int)OffsetOp->getZExtValue(); in tryIndexedLoad()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 4126 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { in InferPointerInfo() argument 4128 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) in InferPointerInfo() 4130 if (OffsetOp.getOpcode() == ISD::UNDEF) in InferPointerInfo()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 5043 SDValue OffsetOp) { in InferPointerInfo() argument 5045 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) in InferPointerInfo() 5047 if (OffsetOp.isUndef()) in InferPointerInfo()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 6217 SDValue OffsetOp) { in InferPointerInfo() argument 6219 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) in InferPointerInfo() 6221 if (OffsetOp.isUndef()) in InferPointerInfo()
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