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Searched refs:Outs (Results 1 – 25 of 157) sorted by relevance

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/external/libchrome/ipc/
Dipc_message_templates_impl.h52 template <typename Meta, typename... Ins, typename... Outs>
53 MessageT<Meta, std::tuple<Ins...>, std::tuple<Outs...>>::MessageT( in MessageT()
56 Outs*... outs) in MessageT()
61 new ParamDeserializer<Outs...>(std::tie(*outs...))) { in MessageT()
65 template <typename Meta, typename... Ins, typename... Outs>
66 bool MessageT<Meta, std::tuple<Ins...>, std::tuple<Outs...>>::ReadSendParam( in ReadSendParam()
73 template <typename Meta, typename... Ins, typename... Outs>
74 bool MessageT<Meta, std::tuple<Ins...>, std::tuple<Outs...>>::ReadReplyParam( in ReadReplyParam()
81 template <typename Meta, typename... Ins, typename... Outs>
84 std::tuple<Outs...>>::WriteReplyParams(Message* reply, in WriteReplyParams()
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Dipc_message_templates.h157 template <typename Meta, typename... Ins, typename... Outs>
158 class MessageT<Meta, std::tuple<Ins...>, std::tuple<Outs...>>
162 using ReplyParam = std::tuple<Outs...>;
170 MessageT(const Ins&... ins, Outs*... outs) in MessageT()
176 MessageT(int32_t routing_id, const Ins&... ins, Outs*... outs) in MessageT()
183 static void WriteReplyParams(Message* reply, const Outs&... outs);
260 MessageT(Routing routing, const Ins&... ins, Outs*... outs);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsCCState.h38 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
43 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
60 PreAnalyzeReturnForVectorFloat(const SmallVectorImpl<ISD::OutputArg> &Outs);
90 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
94 PreAnalyzeCallOperands(Outs, FuncArgs, Func); in AnalyzeCallOperands()
95 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
105 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
107 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
131 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
133 PreAnalyzeReturnForF128(Outs); in AnalyzeReturn()
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DMipsCCState.cpp100 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128() argument
102 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeReturnForF128()
122 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForVectorFloat() argument
123 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeReturnForVectorFloat()
124 ISD::OutputArg Out = Outs[i]; in PreAnalyzeReturnForVectorFloat()
133 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands() argument
136 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeCallOperands()
137 TargetLowering::ArgListEntry FuncArg = FuncArgs[Outs[i].OrigArgIndex]; in PreAnalyzeCallOperands()
142 CallOperandIsFixed.push_back(Outs[i].IsFixed); in PreAnalyzeCallOperands()
DMipsCallLowering.cpp215 SmallVector<ISD::OutputArg, 8> Outs; in lowerReturn() local
220 Outs.emplace_back(flags, vt, argvt, used, origIdx, partOffs); in lowerReturn()
226 CCInfo.AnalyzeReturn(Outs, TLI.CCAssignFnForReturn()); in lowerReturn()
349 SmallVector<ISD::OutputArg, 8> Outs; in lowerCall() local
354 Outs.emplace_back(flags, vt, argvt, used, origIdx, partOffs); in lowerCall()
363 CCInfo.AnalyzeCallOperands(Outs, TLI.CCAssignFnForCall(), FuncOrigArgs, Call); in lowerCall()
/external/llvm/lib/Target/Mips/
DMipsCCState.h38 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
43 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
73 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
77 PreAnalyzeCallOperands(Outs, FuncArgs, CallNode); in AnalyzeCallOperands()
78 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
87 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
89 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
110 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
112 PreAnalyzeReturnForF128(Outs); in AnalyzeReturn()
113 CCState::AnalyzeReturn(Outs, Fn); in AnalyzeReturn()
DMipsCCState.cpp87 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeReturnForF128() argument
89 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeReturnForF128()
100 const SmallVectorImpl<ISD::OutputArg> &Outs, in PreAnalyzeCallOperands() argument
103 for (unsigned i = 0; i < Outs.size(); ++i) { in PreAnalyzeCallOperands()
105 originalTypeIsF128(FuncArgs[Outs[i].OrigArgIndex].Ty, CallNode)); in PreAnalyzeCallOperands()
107 FuncArgs[Outs[i].OrigArgIndex].Ty->isFloatingPointTy()); in PreAnalyzeCallOperands()
108 CallOperandIsFixed.push_back(Outs[i].IsFixed); in PreAnalyzeCallOperands()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DCallingConvLower.cpp88 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn() argument
91 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in CheckReturn()
92 MVT VT = Outs[i].VT; in CheckReturn()
93 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn()
102 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
105 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in AnalyzeReturn()
106 MVT VT = Outs[i].VT; in AnalyzeReturn()
107 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn()
120 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
122 unsigned NumOps = Outs.size(); in AnalyzeCallOperands()
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/external/llvm/lib/Target/SystemZ/
DSystemZCallingConv.h59 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
63 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
64 ArgIsFixed.push_back(Outs[i].IsFixed); in AnalyzeCallOperands()
67 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
68 ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT)); in AnalyzeCallOperands()
70 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
75 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZCallingConv.h59 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
63 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
64 ArgIsFixed.push_back(Outs[i].IsFixed); in AnalyzeCallOperands()
67 for (unsigned i = 0; i < Outs.size(); ++i) in AnalyzeCallOperands()
68 ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT)); in AnalyzeCallOperands()
70 CCState::AnalyzeCallOperands(Outs, Fn); in AnalyzeCallOperands()
75 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
/external/llvm/lib/CodeGen/
DCallingConvLower.cpp89 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn() argument
92 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in CheckReturn()
93 MVT VT = Outs[i].VT; in CheckReturn()
94 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn()
103 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
106 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in AnalyzeReturn()
107 MVT VT = Outs[i].VT; in AnalyzeReturn()
108 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn()
121 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
123 unsigned NumOps = Outs.size(); in AnalyzeCallOperands()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DCallingConvLower.cpp106 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn() argument
109 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in CheckReturn()
110 MVT VT = Outs[i].VT; in CheckReturn()
111 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn()
120 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn() argument
123 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in AnalyzeReturn()
124 MVT VT = Outs[i].VT; in AnalyzeReturn()
125 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn()
138 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands() argument
140 unsigned NumOps = Outs.size(); in AnalyzeCallOperands()
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/external/swiftshader/third_party/LLVM/lib/Target/PTX/
DPTXISelLowering.cpp261 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
271 assert(Outs.size() == 0 && "Kernel must return void."); in LowerReturn()
274 assert(Outs.size() <= 1 && "Can at most return one value."); in LowerReturn()
286 assert(Outs.size() < 2 && "Device functions can return at most one value"); in LowerReturn()
288 if (Outs.size() == 1) { in LowerReturn()
298 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { in LowerReturn()
299 EVT RegVT = Outs[i].VT; in LowerReturn()
348 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerCall() argument
363 Ops.resize(Outs.size() + Ins.size() + 4); in LowerCall()
DPTXISelLowering.h61 const SmallVectorImpl<ISD::OutputArg> &Outs,
70 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp844 const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsRet, in analyzeOutputArgs() argument
846 unsigned NumArgs = Outs.size(); in analyzeOutputArgs()
849 MVT ArgVT = Outs[i].VT; in analyzeOutputArgs()
850 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in analyzeOutputArgs()
851 Type *OrigTy = CLI ? CLI->getArgs()[Outs[i].OrigArgIndex].Ty : nullptr; in analyzeOutputArgs()
854 ArgFlags, CCInfo, Outs[i].IsFixed, IsRet, OrigTy)) { in analyzeOutputArgs()
1107 auto &Outs = CLI.Outs; in IsEligibleForTailCallOptimization() local
1146 auto IsCalleeStructRet = Outs.empty() ? false : Outs[0].Flags.isSRet(); in IsEligibleForTailCallOptimization()
1172 for (auto &Arg : Outs) in IsEligibleForTailCallOptimization()
1185 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
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DRISCVISelLowering.h85 const SmallVectorImpl<ISD::OutputArg> &Outs,
95 const SmallVectorImpl<ISD::OutputArg> &Outs,
98 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCCCState.cpp18 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeCallOperands() argument
19 for (const auto &I : Outs) { in PreAnalyzeCallOperands()
/external/llvm/lib/Target/PowerPC/
DPPCCCState.cpp18 const SmallVectorImpl<ISD::OutputArg> &Outs) { in PreAnalyzeCallOperands() argument
19 for (const auto &I : Outs) { in PreAnalyzeCallOperands()
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZISelLowering.h97 const SmallVectorImpl<ISD::OutputArg> &Outs,
126 const SmallVectorImpl<ISD::OutputArg> &Outs,
135 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.h442 const SmallVectorImpl<ISD::OutputArg> &Outs,
451 const SmallVectorImpl<ISD::OutputArg> &Outs,
457 const SmallVectorImpl<ISD::OutputArg> &Outs,
477 const SmallVectorImpl<ISD::OutputArg> &Outs,
485 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp308 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; in LowerCall() local
310 for (unsigned i = 0; i < Outs.size(); ++i) { in LowerCall()
311 const ISD::OutputArg &Out = Outs[i]; in LowerCall()
435 const SmallVectorImpl<ISD::OutputArg> &Outs, in CanLowerReturn() argument
438 return Outs.size() <= 1; in CanLowerReturn()
443 const SmallVectorImpl<ISD::OutputArg> &Outs, in LowerReturn() argument
446 assert(Outs.size() <= 1 && "WebAssembly can only return up to one value"); in LowerReturn()
455 for (const ISD::OutputArg &Out : Outs) { in LowerReturn()
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelLowering.h128 const SmallVectorImpl<ISD::OutputArg> &Outs,
157 const SmallVectorImpl<ISD::OutputArg> &Outs,
166 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h134 const SmallVectorImpl<ISD::OutputArg> &Outs,
164 const SmallVectorImpl<ISD::OutputArg> &Outs,
168 const SmallVectorImpl<ISD::OutputArg> &Outs,
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DCallingConvLower.h301 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
307 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
312 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
322 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeArguments() argument
324 AnalyzeCallOperands(Outs, Fn); in AnalyzeArguments()
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Analysis/
DTBAATest.cpp59 raw_svector_ostream Outs(ErrorMsg); in TEST_F() local
64 EXPECT_TRUE(verifyFunction(*F, &Outs)); in TEST_F()

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