Home
last modified time | relevance | path

Searched refs:PCI_BASE_ADDRESS_5 (Results 1 – 9 of 9) sorted by relevance

/external/u-boot/arch/x86/cpu/broadwell/
Dsata.c80 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_5, &reg32); in broadwell_sata_init()
/external/u-boot/drivers/ata/
Dahci.c457 uc_priv->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5, in ahci_init_one()
468 uc_priv->mmio_base = pci_map_bar(dev, PCI_BASE_ADDRESS_5, in ahci_init_one()
1191 base = (ulong)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_5, in ahci_probe_scsi_pci()
Dsata_sil3114.c659 pci_read_config_dword (devno, PCI_BASE_ADDRESS_5, &iobase[5]); in init_sata()
/external/u-boot/drivers/misc/
Dswap_case.c98 case PCI_BASE_ADDRESS_5: { in sandbox_swap_case_read_config()
/external/u-boot/drivers/pci/
Dpci.c205 for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar += 4) { in pci_hose_config_device()
Dpcie_layerscape.c385 writel(0, bar_base + PCI_BASE_ADDRESS_5); in ls_pcie_ep_setup_bar()
/external/kernel-headers/original/uapi/linux/
Dpci_regs.h100 #define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */ macro
/external/u-boot/cmd/
Dpci.c191 { "base address 5", PCI_SIZE_32, PCI_BASE_ADDRESS_5 },
/external/u-boot/include/
Dpci.h204 #define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */ macro