| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGAddressAnalysis.cpp | 94 } else if (N->getAddressingMode() == ISD::PRE_DEC) { in match()
127 if (LSBase->getAddressingMode() == ISD::PRE_DEC || in match()
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| D | SelectionDAGDumper.cpp | 410 case ISD::PRE_DEC: return "<pre-dec>"; in getIndexedModeName()
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| D | DAGCombiner.cpp | 12223 !TLI.isIndexedLoadLegal(ISD::PRE_DEC, VT)) in CombineToPreIndexedLoadStore()
12231 !TLI.isIndexedStoreLegal(ISD::PRE_DEC, VT)) in CombineToPreIndexedLoadStore()
12401 X1 = (AM == ISD::PRE_DEC && !Swapped) ? -1 : 1; in CombineToPreIndexedLoadStore()
12402 Y1 = (AM == ISD::PRE_DEC && Swapped) ? -1 : 1; in CombineToPreIndexedLoadStore()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 674 PRE_DEC, enumerator
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 810 PRE_DEC, enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 871 PRE_DEC, enumerator
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| D | BasicTTIImpl.h | 121 return ISD::PRE_DEC; in getISDIndexedMode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRISelDAGToDAG.cpp | 130 (AM != ISD::POST_INC && AM != ISD::PRE_DEC)) { in selectIndexedLoad()
136 bool isPre = (AM == ISD::PRE_DEC); in selectIndexedLoad()
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| D | AVRISelLowering.cpp | 117 setIndexedLoadAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering()
118 setIndexedLoadAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
121 setIndexedStoreAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering()
122 setIndexedStoreAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
809 AM = ISD::PRE_DEC; in getPreIndexedAddressParts()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 366 case ISD::PRE_DEC: return "<pre-dec>"; in getIndexedModeName()
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| D | DAGCombiner.cpp | 9671 !TLI.isIndexedLoadLegal(ISD::PRE_DEC, VT)) in CombineToPreIndexedLoadStore()
9679 !TLI.isIndexedStoreLegal(ISD::PRE_DEC, VT)) in CombineToPreIndexedLoadStore()
9852 X1 = (AM == ISD::PRE_DEC && !Swapped) ? -1 : 1; in CombineToPreIndexedLoadStore()
9853 Y1 = (AM == ISD::PRE_DEC && Swapped) ? -1 : 1; in CombineToPreIndexedLoadStore()
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 703 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
713 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 876 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
886 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 994 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
1005 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1337 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in SelectARMIndexedLoad()
1411 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in SelectT2IndexedLoad()
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| D | ARMISelLowering.cpp | 8335 AM = isInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1479 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryARMIndexedLoad()
1555 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryT2IndexedLoad()
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| D | ARMISelLowering.cpp | 11573 AM = isInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1361 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryARMIndexedLoad()
1468 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryT2IndexedLoad()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 5881 !TLI.isIndexedLoadLegal(ISD::PRE_DEC, VT)) in CombineToPreIndexedLoadStore()
5889 !TLI.isIndexedStoreLegal(ISD::PRE_DEC, VT)) in CombineToPreIndexedLoadStore()
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| D | SelectionDAG.cpp | 6132 case ISD::PRE_DEC: in getIndexedModeName()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1104 bool IsPre = AM == ISD::PRE_INC || AM == ISD::PRE_DEC; in tryIndexedLoad()
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| D | AArch64ISelLowering.cpp | 11096 AM = IsInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1047 bool IsPre = AM == ISD::PRE_INC || AM == ISD::PRE_DEC; in tryIndexedLoad()
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| D | AArch64ISelLowering.cpp | 10024 AM = IsInc ? ISD::PRE_INC : ISD::PRE_DEC; in getPreIndexedAddressParts()
|