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Searched refs:PSW (Results 1 – 23 of 23) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZInstrFP.td28 let Uses = [PSW], usesCustomInserter = 1 in {
32 (SystemZselect FP32:$src1, FP32:$src2, imm:$cc, PSW))]>;
36 (SystemZselect FP64:$src1, FP64:$src2, imm:$cc, PSW))]>;
100 let Defs = [PSW] in {
104 (implicit PSW)]>;
108 (implicit PSW)]>;
113 (implicit PSW)]>;
117 (implicit PSW)]>;
122 (implicit PSW)]>;
126 (implicit PSW)]>;
[all …]
DSystemZInstrInfo.td78 let Uses = [PSW], usesCustomInserter = 1 in {
82 (SystemZselect GR32:$src1, GR32:$src2, imm:$cc, PSW))]>;
86 (SystemZselect GR64:$src1, GR64:$src2, imm:$cc, PSW))]>;
107 let Uses = [PSW] in {
110 [(SystemZbrcond bb:$dst, SYSTEMZ_COND_O, PSW)]>;
113 [(SystemZbrcond bb:$dst, SYSTEMZ_COND_H, PSW)]>;
116 [(SystemZbrcond bb:$dst, SYSTEMZ_COND_NLE, PSW)]>;
119 [(SystemZbrcond bb:$dst, SYSTEMZ_COND_L, PSW)]>;
122 [(SystemZbrcond bb:$dst, SYSTEMZ_COND_NHE, PSW)]>;
125 [(SystemZbrcond bb:$dst, SYSTEMZ_COND_LH, PSW)]>;
[all …]
DSystemZRegisterInfo.td162 def PSW : SystemZReg<"psw">;
203 def CCR : RegisterClass<"SystemZ", [i64], 64, (add PSW)> {
/external/u-boot/arch/nds32/cpu/n1213/ag101/
Dwatchdog.S26 ! Disable Interrupts by clear GIE in $PSW reg
/external/u-boot/arch/nds32/cpu/n1213/
Dstart.S30 #define PSW $ir0 macro
31 #define EIT_INTR_PSW $ir1 ! interruption $PSW
449 mfsr $r28, PSW ! $PSW
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZInstrSystem.td21 // Extract PSW.
25 // Load PSW (extended).
31 // Insert PSW key.
35 // Set PSW key from address.
DSystemZRegisterInfo.td296 // The 2-bit condition code field of the PSW. Every register named in an
DSystemZInstrFormats.td4698 // the value of the PSW's 2-bit condition code field.
/external/python/cpython2/Modules/_ctypes/libffi/src/vax/
Delfbsd.S90 movzwl 4(%fp), %r0 # previous PSW, without the saved registers mask
/external/libffi/src/vax/
Delfbsd.S90 movzwl 4(%fp), %r0 # previous PSW, without the saved registers mask
/external/llvm/lib/Target/SystemZ/
DSystemZRegisterInfo.td282 // The 2-bit condition code field of the PSW. Every register named in an
DSystemZInstrFormats.td2470 // the value of the PSW's 2-bit condition code field.
/external/swiftshader/third_party/llvm-subzero/lib/Support/Unix/
DSignals.inc249 // On S/390, certain signals are delivered with PSW Address pointing to
/external/llvm/lib/Support/Unix/
DSignals.inc249 // On S/390, certain signals are delivered with PSW Address pointing to
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/Unix/
DSignals.inc346 // On S/390, certain signals are delivered with PSW Address pointing to
/external/honggfuzz/examples/apache-httpd/corpus_http1/
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/external/apache-commons-bcel/docs/verifier/
DJustIce.lyx2299 (PSW) in the JVM.
2300 Traditionally, a PSW has flags that are set implicitly during execution
/external/honggfuzz/examples/apache-httpd/corpus_http2/
D42c9e6e34c1e7bd1b8617878e9f60423.000d4df4.honggfuzz.cov524 ��������9Rk%uH1�u֧�g��c�I���ޖ�c�pW$4�����Bf��QtL/��#C�6c�|����8�*N����yވ�M��PSW��� ��DM:���…
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart1.csv7465 ,"BR","PSW","Passos","Passos","MG","---4----","AI","9601",,,
22874 ,"DE","PSW","Petershagen/Weser","Petershagen/Weser","NW","123-----","AF","9506",,,
39910 "+","FR","PSW","Poiseul-la-Grange","Poiseul-la-Grange","21","--3-----","RL","1301",,"4734N 00448E",
D2013-1_UNLOCODE_CodeListPart2.csv4009 ,"GB","PSW","Portstewart","Portstewart","CLR","1-3-----","AA","0701",,"5511N 00643W",
D2013-1_UNLOCODE_CodeListPart3.csv22254 ,"US","PSW","Plainview","Plainview","OH","--3-----","RL","0401",,"3940N 08106W",