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Searched refs:READCYCLECOUNTER (Results 1 – 25 of 34) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Drdtsc.ll4 ; Verify that we correctly lower ISD::READCYCLECOUNTER.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Drdtsc.ll5 ; Verify that we correctly lower ISD::READCYCLECOUNTER.
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h564 READCYCLECOUNTER, enumerator
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h664 READCYCLECOUNTER, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h710 READCYCLECOUNTER, enumerator
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
DBlackfinISelLowering.cpp117 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in BlackfinTargetLowering()
485 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
DAlphaISelDAGToDAG.cpp249 case ISD::READCYCLECOUNTER: { in Select()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp80 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; in getOperationName()
DLegalizeDAG.cpp1039 case ISD::READCYCLECOUNTER: in LegalizeOp()
2778 case ISD::READCYCLECOUNTER: in ExpandNode()
DLegalizeIntegerTypes.cpp1326 case ISD::READCYCLECOUNTER: ExpandIntRes_READCYCLECOUNTER(N, Lo, Hi); break; in ExpandIntegerResult()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp101 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; in getOperationName()
DLegalizeDAG.cpp1069 case ISD::READCYCLECOUNTER: in LegalizeOp()
2881 case ISD::READCYCLECOUNTER: in ExpandNode()
DLegalizeIntegerTypes.cpp1398 case ISD::READCYCLECOUNTER: ExpandIntRes_READCYCLECOUNTER(N, Lo, Hi); break; in ExpandIntegerResult()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp656 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Expand); in initActions()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1296 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in HexagonTargetLowering()
2829 case ISD::READCYCLECOUNTER: return LowerREADCYCLECOUNTER(Op, DAG); in LowerOperation()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp911 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Expand); in initActions()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td490 def readcyclecounter : SDNode<"ISD::READCYCLECOUNTER", SDTIntLeaf,
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/
DTargetSelectionDAG.td472 def readcyclecounter : SDNode<"ISD::READCYCLECOUNTER", SDTIntLeaf,
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp202 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Legal); in SITargetLowering()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.cpp412 setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom); in X86TargetLowering()
10447 case ISD::READCYCLECOUNTER: return LowerREADCYCLECOUNTER(Op, DAG); in LowerOperation()
10531 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp833 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, isPPC64 ? Legal : Custom); in PPCTargetLowering()
8315 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DSelectionDAG.cpp5891 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; in getOperationName()
DSelectionDAGBuilder.cpp4935 Res = DAG.getNode(ISD::READCYCLECOUNTER, dl, in visitIntrinsicCall()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp769 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in ARMTargetLowering()
7260 case ISD::READCYCLECOUNTER: in ReplaceNodeResults()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp857 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in ARMTargetLowering()
8205 case ISD::READCYCLECOUNTER: in ReplaceNodeResults()

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