/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/ |
D | SparseBitVector.h | 241 const SparseBitVectorElement &RHS2, in intersectWithComplement() 247 Bits[i] = RHS1.Bits[i] & ~RHS2.Bits[i]; in intersectWithComplement() 684 const SparseBitVector<ElementSize> &RHS2) in intersectWithComplement() argument 687 intersectWithComplement(RHS2); in intersectWithComplement() 689 } else if (this == &RHS2) { in intersectWithComplement() 690 SparseBitVector RHS2Copy(RHS2); in intersectWithComplement() 698 ElementListConstIter Iter2 = RHS2.Elements.begin(); in intersectWithComplement() 706 while (Iter2 != RHS2.Elements.end()) { in intersectWithComplement() 730 const SparseBitVector<ElementSize> *RHS2) { in intersectWithComplement() argument 731 intersectWithComplement(*RHS1, *RHS2); in intersectWithComplement()
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/external/llvm/include/llvm/ADT/ |
D | SparseBitVector.h | 233 const SparseBitVectorElement &RHS2, 239 Bits[i] = RHS1.Bits[i] & ~RHS2.Bits[i]; 698 const SparseBitVector<ElementSize> &RHS2) 701 intersectWithComplement(RHS2); 703 } else if (this == &RHS2) { 704 SparseBitVector RHS2Copy(RHS2); 712 ElementListConstIter Iter2 = RHS2.Elements.begin(); 720 while (Iter2 != RHS2.Elements.end()) { 756 const SparseBitVector<ElementSize> *RHS2) { 757 intersectWithComplement(*RHS1, *RHS2);
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/external/swiftshader/third_party/LLVM/include/llvm/ADT/ |
D | SparseBitVector.h | 255 const SparseBitVectorElement &RHS2, 261 Bits[i] = RHS1.Bits[i] & ~RHS2.Bits[i]; 692 const SparseBitVector<ElementSize> &RHS2) 697 ElementListConstIter Iter2 = RHS2.Elements.begin(); 705 while (Iter2 != RHS2.Elements.end()) { 743 const SparseBitVector<ElementSize> *RHS2) { 744 intersectWithComplement(*RHS1, *RHS2);
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/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
D | InstCombineSelect.cpp | 842 Value *LHS, *RHS, *LHS2, *RHS2; in visitSelectInst() local 844 if (SelectPatternFlavor SPF2 = MatchSelectPattern(LHS, LHS2, RHS2)) in visitSelectInst() 845 if (Instruction *R = FoldSPFofSPF(cast<Instruction>(LHS),SPF2,LHS2,RHS2, in visitSelectInst() 848 if (SelectPatternFlavor SPF2 = MatchSelectPattern(RHS, LHS2, RHS2)) in visitSelectInst() 849 if (Instruction *R = FoldSPFofSPF(cast<Instruction>(RHS),SPF2,LHS2,RHS2, in visitSelectInst()
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombineSelect.cpp | 1103 Value *LHS, *RHS, *LHS2, *RHS2; in visitSelectInst() local 1138 if (SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor) in visitSelectInst() 1139 if (Instruction *R = FoldSPFofSPF(cast<Instruction>(LHS),SPF2,LHS2,RHS2, in visitSelectInst() 1142 if (SelectPatternFlavor SPF2 = matchSelectPattern(RHS, LHS2, RHS2).Flavor) in visitSelectInst() 1143 if (Instruction *R = FoldSPFofSPF(cast<Instruction>(RHS),SPF2,LHS2,RHS2, in visitSelectInst()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | cond-sel.ll | 151 ; CHECK: cmp [[LHS2:w[0-9]+]], [[RHS2:w[0-9]+]] 152 ; CHECK: csinv {{w[0-9]+}}, [[RHS2]], wzr, gt
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/external/llvm/test/CodeGen/AArch64/ |
D | cond-sel.ll | 151 ; CHECK: cmp [[LHS2:w[0-9]+]], [[RHS2:w[0-9]+]] 152 ; CHECK: csinv {{w[0-9]+}}, [[RHS2]], wzr, gt
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
D | InstCombineSelect.cpp | 1762 Value *LHS, *RHS, *LHS2, *RHS2; in visitSelectInst() local 1821 if (SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor) in visitSelectInst() 1822 if (Instruction *R = foldSPFofSPF(cast<Instruction>(LHS),SPF2,LHS2,RHS2, in visitSelectInst() 1825 if (SelectPatternFlavor SPF2 = matchSelectPattern(RHS, LHS2, RHS2).Flavor) in visitSelectInst() 1826 if (Instruction *R = foldSPFofSPF(cast<Instruction>(RHS),SPF2,LHS2,RHS2, in visitSelectInst()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
D | AVRISelLowering.cpp | 572 SDValue RHS2 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_1, in getAVRCmp() local 585 Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS2, RHS2, Cmp); in getAVRCmp()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 3783 SDValue RHS2 = Op2.getOperand(1); in isSaturatingConditional() local 3793 SDValue *K2 = isa<ConstantSDNode>(LHS2) ? &LHS2 : isa<ConstantSDNode>(RHS2) in isSaturatingConditional() 3794 ? &RHS2 in isSaturatingConditional() 3798 SDValue V2Tmp = (K2 && *K2 == LHS2) ? RHS2 : LHS2; in isSaturatingConditional() 3819 : isLowerSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2) ? &Op2 in isSaturatingConditional() 3824 : isUpperSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2) ? &Op2 in isSaturatingConditional() 4045 SDValue RHS1, RHS2; in OptimizeVFPBrcond() local 4047 expandf64Toi32(RHS, DAG, RHS1, RHS2); in OptimizeVFPBrcond() 4049 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond() 4053 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4313 SDValue RHS2 = Op2.getOperand(1); in isSaturatingConditional() local 4323 SDValue *K2 = isa<ConstantSDNode>(LHS2) ? &LHS2 : isa<ConstantSDNode>(RHS2) in isSaturatingConditional() 4324 ? &RHS2 in isSaturatingConditional() 4328 SDValue V2Tmp = (K2 && *K2 == LHS2) ? RHS2 : LHS2; in isSaturatingConditional() 4349 : isLowerSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2) in isSaturatingConditional() 4355 : isUpperSaturate(LHS2, RHS2, TrueVal2, FalseVal2, CC2, *K2) in isSaturatingConditional() 4653 SDValue RHS1, RHS2; in OptimizeVFPBrcond() local 4655 expandf64Toi32(RHS, DAG, RHS1, RHS2); in OptimizeVFPBrcond() 4657 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond() 4661 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 2922 SDValue RHS1, RHS2; in OptimizeVFPBrcond() local 2924 expandf64Toi32(RHS, DAG, RHS1, RHS2); in OptimizeVFPBrcond() 2928 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest }; in OptimizeVFPBrcond() 6200 unsigned RHS2 = MI->getOperand(4).getReg(); in EmitInstrWithCustomInserter() local 6205 .addReg(LHS2).addReg(RHS2) in EmitInstrWithCustomInserter()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.cpp | 8446 SDValue RHS2 = Extract128BitVector(RHS, Idx1, DAG, dl); in Lower256IntVSETCC() local 8453 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2, CC)); in Lower256IntVSETCC() 9800 SDValue RHS2 = Extract128BitVector(RHS, Idx1, DAG, dl); in Lower256IntArith() local 9807 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2)); in Lower256IntArith()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 15124 SDValue RHS2 = extract128BitVector(RHS, NumElems / 2, DAG, dl); in Lower256IntVSETCC() local 15131 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2, CC)); in Lower256IntVSETCC() 19228 SDValue RHS2 = extract128BitVector(RHS, NumElems / 2, DAG, dl); in Lower256IntArith() local 19235 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2)); in Lower256IntArith() 19257 SDValue RHS2 = extract256BitVector(RHS, NumElems / 2, DAG, dl); in Lower512IntArith() local 19264 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2)); in Lower512IntArith()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 18256 SDValue RHS2 = extract128BitVector(RHS, NumElems / 2, DAG, dl); in Lower256IntVSETCC() local 18263 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2, CC)); in Lower256IntVSETCC() 22442 SDValue RHS2 = extract128BitVector(RHS, NumElems / 2, DAG, dl); in Lower256IntArith() local 22449 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2)); in Lower256IntArith() 22471 SDValue RHS2 = extract256BitVector(RHS, NumElems / 2, DAG, dl); in Lower512IntArith() local 22478 DAG.getNode(Op.getOpcode(), dl, NewVT, LHS2, RHS2)); in Lower512IntArith()
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