| /external/boringssl/src/ssl/test/runner/ |
| D | rsa_chain_cert.pem | 16 MYgF91UDvVzvnYm6TfseM2+ewKirC00GOrZ7rEcFvtxnKSqYf4ckqfNdSU1Y+RRC
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 37 RRC, enumerator
|
| D | MSP430ISelLowering.cpp | 625 Victim = DAG.getNode(MSP430ISD::RRC, dl, VT, Victim); in LowerShifts()
980 case MSP430ISD::RRC: return "MSP430ISD::RRC"; in getTargetNodeName()
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| D | MSP430InstrInfo.td | 49 def MSP430rrc : SDNode<"MSP430ISD::RRC", SDTIntUnaryOp, []>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 37 RRC, enumerator
|
| D | MSP430ISelLowering.cpp | 966 Victim = DAG.getNode(MSP430ISD::RRC, dl, VT, Victim); in LowerShifts()
1344 case MSP430ISD::RRC: return "MSP430ISD::RRC"; in getTargetNodeName()
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| D | MSP430InstrInfo.td | 50 def MSP430rrc : SDNode<"MSP430ISD::RRC", SDTIntUnaryOp, []>;
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 37 RRC, enumerator
|
| D | MSP430ISelLowering.cpp | 746 Victim = DAG.getNode(MSP430ISD::RRC, dl, VT, Victim); in LowerShifts()
1122 case MSP430ISD::RRC: return "MSP430ISD::RRC"; in getTargetNodeName()
|
| D | MSP430InstrInfo.td | 49 def MSP430rrc : SDNode<"MSP430ISD::RRC", SDTIntUnaryOp, []>;
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 720 const TargetRegisterClass *RRC = *I; in hasLegalSuperRegRegClasses() local
721 if (isLegalRC(RRC)) in hasLegalSuperRegRegClasses()
737 const TargetRegisterClass *RRC = *I; in findRepresentativeClass() local
738 if (RRC->isASubClass() || !isLegalRC(RRC)) in findRepresentativeClass()
740 if (!hasLegalSuperRegRegClasses(RRC)) in findRepresentativeClass()
741 return std::make_pair(RRC, 1); in findRepresentativeClass()
742 BestRC = RRC; in findRepresentativeClass()
906 const TargetRegisterClass* RRC; in computeRegisterProperties() local
908 tie(RRC, Cost) = findRepresentativeClass((MVT::SimpleValueType)i); in computeRegisterProperties()
909 RepRegClassForVT[i] = RRC; in computeRegisterProperties()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1245 const TargetRegisterClass* RRC; in computeRegisterProperties() local
1247 std::tie(RRC, Cost) = findRepresentativeClass(TRI, (MVT::SimpleValueType)i); in computeRegisterProperties()
1248 RepRegClassForVT[i] = RRC; in computeRegisterProperties()
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1473 const TargetRegisterClass* RRC; in computeRegisterProperties() local
1475 std::tie(RRC, Cost) = findRepresentativeClass(TRI, (MVT::SimpleValueType)i); in computeRegisterProperties()
1476 RepRegClassForVT[i] = RRC; in computeRegisterProperties()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 3049 const TargetRegisterClass *RRC = nullptr; in findRepresentativeClass() local
3059 RRC = &Hexagon::VectorRegsRegClass; in findRepresentativeClass()
3067 RRC = &Hexagon::VectorRegs128BRegClass; in findRepresentativeClass()
3069 RRC = &Hexagon::VecDblRegsRegClass; in findRepresentativeClass()
3075 RRC = &Hexagon::VecDblRegs128BRegClass; in findRepresentativeClass()
3078 return std::make_pair(RRC, Cost); in findRepresentativeClass()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonBitSimplify.cpp | 1880 auto *RRC = HBS::getFinalVRegClass(R, MRI); in validateReg() local
1881 return OpRC->hasSubClassEq(RRC); in validateReg()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 774 const TargetRegisterClass *RRC = 0; in findRepresentativeClass() local
784 RRC = ARM::DPRRegisterClass; in findRepresentativeClass()
794 RRC = ARM::DPRRegisterClass; in findRepresentativeClass()
798 RRC = ARM::DPRRegisterClass; in findRepresentativeClass()
802 RRC = ARM::DPRRegisterClass; in findRepresentativeClass()
806 return std::make_pair(RRC, Cost); in findRepresentativeClass()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1079 const TargetRegisterClass *RRC = nullptr; in findRepresentativeClass() local
1089 RRC = &ARM::DPRRegClass; in findRepresentativeClass()
1099 RRC = &ARM::DPRRegClass; in findRepresentativeClass()
1103 RRC = &ARM::DPRRegClass; in findRepresentativeClass()
1107 RRC = &ARM::DPRRegClass; in findRepresentativeClass()
1111 return std::make_pair(RRC, Cost); in findRepresentativeClass()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1204 const TargetRegisterClass *RRC = nullptr; in findRepresentativeClass() local
1214 RRC = &ARM::DPRRegClass; in findRepresentativeClass()
1224 RRC = &ARM::DPRRegClass; in findRepresentativeClass()
1228 RRC = &ARM::DPRRegClass; in findRepresentativeClass()
1232 RRC = &ARM::DPRRegClass; in findRepresentativeClass()
1236 return std::make_pair(RRC, Cost); in findRepresentativeClass()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 1332 const TargetRegisterClass *RRC = 0; in findRepresentativeClass() local
1338 RRC = (Subtarget->is64Bit() in findRepresentativeClass()
1342 RRC = X86::VR64RegisterClass; in findRepresentativeClass()
1349 RRC = X86::VR128RegisterClass; in findRepresentativeClass()
1352 return std::make_pair(RRC, Cost); in findRepresentativeClass()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 1934 const TargetRegisterClass *RRC = nullptr; in findRepresentativeClass() local
1940 RRC = Subtarget.is64Bit() ? &X86::GR64RegClass : &X86::GR32RegClass; in findRepresentativeClass()
1943 RRC = &X86::VR64RegClass; in findRepresentativeClass()
1950 RRC = &X86::VR128RegClass; in findRepresentativeClass()
1953 return std::make_pair(RRC, Cost); in findRepresentativeClass()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2065 const TargetRegisterClass *RRC = nullptr; in findRepresentativeClass() local
2071 RRC = Subtarget.is64Bit() ? &X86::GR64RegClass : &X86::GR32RegClass; in findRepresentativeClass()
2074 RRC = &X86::VR64RegClass; in findRepresentativeClass()
2083 RRC = &X86::VR128XRegClass; in findRepresentativeClass()
2086 return std::make_pair(RRC, Cost); in findRepresentativeClass()
|
| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart1.csv | 6172 ,"BR","RRC","Ararica","Ararica","RS","-----6--","RL","1007",,"2939S 05055W",
10207 ,"CA","RRC","Red Rock","Red Rock","ON","123-----","RQ","1007",,"4857N 08817W",
12024 ,"CH","RRC","Rorschach","Rorschach","SG","--3-----","RL","0207","ZJZ","4728N 00929E",
23301 ,"DE","RRC","Rohrdorf (Schwarzwald)","Rohrdorf (Schwarzwald)","BW","-----6--","RL","0901",,"4834N 0…
41908 ,"FR","RRC","Saint-Sernin-sur-Rance","Saint-Sernin-sur-Rance",,"--3-----","RQ","1101",,"4353N 00236…
|
| D | 2013-1_UNLOCODE_CodeListPart2.csv | 14871 ,"IT","RRC","Serra Ricc�","Serra Ricco","GE","--3-----","RL","0401",,"4432N 00856E",
|
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 23124 ,"US","RRC","Rio Rancho","Rio Rancho","NM","--3-----","RQ","9307",,,
|
| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | 03d7e517425430613d18e6cf09f06f50.000b6ce7.honggfuzz.cov | 1158 ��?�[h�G��Z8�"�{[� X�"-0��媶�L# RRC�n[�����!ӻRv@IJ?�x�^�uj@,�[܊�~ǜ[�N���:=�Α< � ۛ�wF�$��8��
|