/external/llvm/include/llvm/MC/ |
D | MCRegisterInfo.h | 434 bool isSubRegister(unsigned RegA, unsigned RegB) const { in isSubRegister() argument 435 return isSuperRegister(RegB, RegA); in isSubRegister() 439 bool isSuperRegister(unsigned RegA, unsigned RegB) const; 442 bool isSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSubRegisterEq() argument 443 return isSuperRegisterEq(RegB, RegA); in isSubRegisterEq() 448 bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperRegisterEq() argument 449 return RegA == RegB || isSuperRegister(RegA, RegB); in isSuperRegisterEq() 454 bool isSuperOrSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperOrSubRegisterEq() argument 455 return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB); in isSuperOrSubRegisterEq() 527 inline bool MCRegisterInfo::isSuperRegister(unsigned RegA, unsigned RegB) const{ in isSuperRegister() argument [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
D | MCRegisterInfo.h | 456 bool isSubRegister(unsigned RegA, unsigned RegB) const { in isSubRegister() argument 457 return isSuperRegister(RegB, RegA); in isSubRegister() 461 bool isSuperRegister(unsigned RegA, unsigned RegB) const; 464 bool isSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSubRegisterEq() argument 465 return isSuperRegisterEq(RegB, RegA); in isSubRegisterEq() 470 bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperRegisterEq() argument 471 return RegA == RegB || isSuperRegister(RegA, RegB); in isSuperRegisterEq() 476 bool isSuperOrSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperOrSubRegisterEq() argument 477 return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB); in isSuperOrSubRegisterEq() 552 inline bool MCRegisterInfo::isSuperRegister(unsigned RegA, unsigned RegB) const{ in isSuperRegister() argument [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | TwoAddressInstructionPass.cpp | 140 bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB); 144 unsigned RegA, unsigned RegB, unsigned Dist); 563 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) { in regsAreCompatible() argument 564 if (RegA == RegB) in regsAreCompatible() 566 if (!RegA || !RegB) in regsAreCompatible() 568 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible() 714 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){ in isProfitableToConv3Addr() argument 721 unsigned FromRegB = getMappedReg(RegB, SrcRegMap); in isProfitableToConv3Addr() 733 unsigned RegA, unsigned RegB, in convertInstTo3Addr() argument 750 if (NewMI->findRegisterUseOperand(RegB, false, TRI)) in convertInstTo3Addr() [all …]
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D | ImplicitNullChecks.cpp | 284 unsigned RegB = MOB.getReg(); in canReorder() local 286 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef())) in canReorder()
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D | TargetInstrInfo.cpp | 812 unsigned RegB = OpB.getReg(); in reassociateOps() local 819 if (TargetRegisterInfo::isVirtualRegister(RegB)) in reassociateOps() 820 MRI.constrainRegClass(RegB, RC); in reassociateOps()
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/external/llvm/lib/CodeGen/ |
D | TwoAddressInstructionPass.cpp | 115 bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB); 119 unsigned RegA, unsigned RegB, unsigned Dist); 534 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) { in regsAreCompatible() argument 535 if (RegA == RegB) in regsAreCompatible() 537 if (!RegA || !RegB) in regsAreCompatible() 539 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible() 674 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){ in isProfitableToConv3Addr() argument 681 unsigned FromRegB = getMappedReg(RegB, SrcRegMap); in isProfitableToConv3Addr() 693 unsigned RegA, unsigned RegB, in convertInstTo3Addr() argument 710 if (NewMI->findRegisterUseOperand(RegB, false, TRI)) in convertInstTo3Addr() [all …]
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D | TargetInstrInfo.cpp | 702 unsigned RegB = OpB.getReg(); in reassociateOps() local 709 if (TargetRegisterInfo::isVirtualRegister(RegB)) in reassociateOps() 710 MRI.constrainRegClass(RegB, RC); in reassociateOps()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | TwoAddressInstructionPass.cpp | 106 unsigned RegB, unsigned RegC, unsigned Dist); 108 bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB); 113 unsigned RegA, unsigned RegB, unsigned Dist); 516 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) { in regsAreCompatible() argument 517 if (RegA == RegB) in regsAreCompatible() 519 if (!RegA || !RegB) in regsAreCompatible() 521 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible() 595 unsigned RegB, unsigned RegC, unsigned Dist) { in CommuteInstruction() argument 631 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){ in isProfitableToConv3Addr() argument 638 unsigned FromRegB = getMappedReg(RegB, SrcRegMap); in isProfitableToConv3Addr() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Analysis/ |
D | SparsePropagation.cpp | 483 auto RegB = TestLatticeKey(B, IPOGrouping::Register); in TEST_F() local 485 EXPECT_TRUE(Solver.getExistingValueState(RegB).isConstant()); in TEST_F()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 1981 for (auto &RegB : UsesB) { in isDependent() local 1983 if (RegA == RegB) in isDependent() 1988 if (RegB == *SubRegs) in isDependent() 1991 if (Hexagon::DoubleRegsRegClass.contains(RegB)) in isDependent() 1992 for (MCSubRegIterator SubRegs(RegB, &HRI); SubRegs.isValid(); ++SubRegs) in isDependent()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 2048 for (auto &RegB : UsesB) { in isDependent() local 2050 if (RegA == RegB) in isDependent() 2055 if (RegB == *SubRegs) in isDependent() 2058 if (TargetRegisterInfo::isPhysicalRegister(RegB)) in isDependent() 2059 for (MCSubRegIterator SubRegs(RegB, &HRI); SubRegs.isValid(); ++SubRegs) in isDependent()
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