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Searched refs:SDC1_HDRV_PULL_CTL_REG (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/board/qualcomm/dragonboard820c/
Ddragonboard820c.c91 clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG, in sdhci_power_init()
96 clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG, in sdhci_power_init()
101 clrsetbits_le32(SDC1_HDRV_PULL_CTL_REG, in sdhci_power_init()
/external/u-boot/arch/arm/mach-snapdragon/include/mach/
Dsysmap-apq8096.h13 #define SDC1_HDRV_PULL_CTL_REG (TLMM_BASE_ADDR + 0x0012D000) macro